On the design of a planar phased array radar antenna architecture for space debris situational awareness

The Space Situational Awareness (SSA) program from the European Space Agency (ESA) protects Europe's citizens and their satellite-based services by detecting space hazards. ESA Ground Systems (GS) division is currently designing a phased array radar composed of thousands of radiating elements for future stages of the SSA program [1]. The radar shall guarantee the detection of most of the Low Earth Orbit (LEO) space debris, providing a general map of space junk. While range accuracy is mainly dictated by the radar waveform, the detection and tracking of small objects in LEO regimes is highly dependent on the angular accuracy achieved by the smart phased array antenna, demonstrating the important of the performance of this architecture.

GEODA-SARAS: Multi-Phased array planar antenna for satellite communications

Nowadays, earth stations have as a common feature the use of large reflector antenna for downloading data from satellites. Large reflectors have impairments such as mechanical complexity, low flexibility and high cost. Thus, the feasibility of other antenna technologies must be evaluated, such as conformal adaptive antennas based on multiple planar active arrays. In the scenery under study, the capability to track several satellites simultaneously, higher flexibility, lower production and maintenance cost, modularity and a more efficient use of the spectrum; are the most important advantage to boost up active antenna arrays over large dishes.

Surface impedance for scattered field on a dielectric-coated circular cylinder

In the scattering analysis of a circular cylindrical structure, the impedance boundary condition (IBC) can approximate and simplify the perfect electric conductor (PEC) boundary condition. The circular cylinder problem can be solved with modal methods but they require a large number of terms when the cylinder radius is large in terms of the wave length. The uniform theory of diffraction (UTD) [1] is commonly used to overcome this issue. The two-dimensional problem of scattering on a circular cylinder covered by a dielectric layer has been analyzed by [2]–[5], but their solutions either do not consider oblique incidence, fail on the transition region or use a constant surface impedance.

Surface impedance for electromagnetic fields over a dielectric-coated circular cylinder

For small or medium size conformal array antennas in terms of the wave length, modal solutions in spectral domain for mutual coupling analysis are convenient for canonical shapes such as circular cylinder [1] or sphere [2], but as the antenna dimensions increase a large number of terms are necessary. For large structures the uniform theory of diffraction (UTD) is commonly used to solve this problem for canonical and arbitrarily convex shaped perfect electric conductor (PEC) surfaces [3]. A UTD solution for mutual coupling on an impedance cylinder has been introduced in [4], [5] but using a constant surface impedance.

A reflection suppression technique for far field antenna measurements

This paper presents a reflection suppression technique for far field antenna measurements. The technique is based on a source reconstruction over a surface greater than the antenna itself. To be able to perform the reflection construction the next steps are required: the complete far field antenna pattern is obtained through interpolation of the acquired cuts, the currents are obtained through a holographic technique, the field out of the antenna area is filtered, and the pattern is reconstructed. The algorithm is used with measurements in the LEHA-UPM antenna measurement facilities and in the outdoor far field facility of LIT INPE in Brazil.

Deployment of an all-in-one millimetre-wave anechoic chamber

This paper describes the new anechoic chamber available at The University of Kent, UK. This facility includes a spherical near/far field, planar near field, cylindrical near field and a compact range. The facility allows measurement from 600 MHz up to 110 MHz. The spherical, planar and cylindrical ranges covers up to 40 GHz and the compact range is available from 50 GHz up to 110 MHz. Immediate plans are to use the new facility to measure body-centric antennas and sensing nodes together with near field sampling of finite sized Frequency Selective Surfaces.

Comparison of different MIMO antenna arrays and user's effect on their performances

Multiple-input multiple-output (MIMO) systems have entailed a great enhancement in wireless communications performances. The use of multiple antennas at each side of the radio link has been included in recent drafts and standards such as WLAN, WIMAX, or DVB-T2. The MIMO performances depend on the antenna array characteristics and thus several aspects have to be taken into account to design MIMO antennas. In the literature, many articles can be found in terms of capacity or antenna design, but in this article, different types of antenna arrays for MIMO systems are measured in a reverberation chamber with and without a phantom as a user's head. As a result, the MIMO performances are degraded by the user in terms of efficiency, diversity gain, and capacity. Omnidirectional antennas such as monopoles with high radiation efficiency offer the highest performance for a rich scattering nonline of sight indoor environment.

Design techniques for xilinx virtex FPGA configuration memory scrubbers

SRAM-based FPGAs are in-field reconfigurable an unlimited number of times. This characteristic, together with their high performance and high logic density, proves to be very convenient for a number of ground and space level applications. One drawback of this technology is that it is susceptible to ionizing radiation, and this sensitivity increases with technology scaling. This is a first order concern for applications in harsh radiation environments, and starts to be a concern for high reliability ground applications. Several techniques exist for coping with radiation effects at user application. In order to be effective they need to be complemented with configuration memory scrubbing, which allows error mitigation and prevents failures due to error accumulation. Depending on the radiation environment and on the system dependability requirements, the configuration scrubber design can become more or less complex. This paper classifies and presents current and novel design methodologies and architectures for SRAM-based FPGAs, and in particular for Xilinx Virtex-4QV/5QV, configuration memory scrubbers.

A self-adaptive image processing application based on evolvable and scalable hardware

Evolvable Hardware (EH) is a technique that consists of using reconfigurable hardware devices whose configuration is controlled by an Evolutionary Algorithm (EA). Our system consists of a fully-FPGA implemented scalable EH platform, where the Reconfigurable processing Core (RC) can adaptively increase or decrease in size. Figure 1 shows the architecture of the proposed System-on-Programmable-Chip (SoPC), consisting of a MicroBlaze processor responsible of controlling the whole system operation, a Reconfiguration Engine (RE), and a Reconfigurable processing Core which is able to change its size in both height and width. This system is used to implement image filters, which are generated autonomously thanks to the evolutionary process. The system is complemented with a camera that enables the usage of the platform for real time applications.

Explointing FPGA block memories for protected cryptographic implementations

Modern Field Programmable Gate Arrays (FPGAs) are power packed with features to facilitate designers. Availability of features like huge block memory (BRAM), Digital Signal Processing (DSP) cores, embedded CPU makes the design strategy of FPGAs quite different from ASICs. FPGA are also widely used in security-critical application where protection against known attacks is of prime importance. We focus ourselves on physical attacks which target physical implementations. To design countermeasures against such attacks, the strategy for FPGA designers should also be different from that in ASIC. The available features should be exploited to design compact and strong countermeasures. In this paper, we propose methods to exploit the BRAMs in FPGAs for designing compact countermeasures. BRAM can be used to optimize intrinsic countermeasures like masking and dual-rail logic, which otherwise have significant overhead (at least 2X). The optimizations are applied on a real AES-128 co-processor and tested for area overhead and resistance on Xilinx Virtex-5 chips. The presented masking countermeasure has an overhead of only 16% when applied on AES. Moreover Dual-rail Precharge Logic (DPL) countermeasure has been optimized to pack the whole sequential part in the BRAM, hence enhancing the security. Proper robustness evaluations are conducted to analyze the optimization for area and security.

New device for continuous-wave THz emission: large area emitter

We discuss two different approaches to overcome the power limitations of CW THz generation imposed to conventional photomixers. The increase in power achievable by using arrays of AEs is studied. Then ?large area emitters? are proposed as an alternate approach to overcome the power limitations. In this antenna-free new scheme of photomixing, the THz radiation originates directly from the acceleration of photo-induced charge carriers generated within a large semiconductor area. The quasi-continuous distribution of emitting elements corresponds to a high-density array and results in particularly favorable radiation profiles.

Antena plana Banda Ku en tecnología SIW

This document contains the different parts of a plain antenna which is able to establish a satellite communication. This antenna has been designed in Ku Band. Nowadays this band is specially used by satellite communications and shows numerous advantages, for instance the antennas have small size therefore these antennas are cheaper. The SIW technology is a fundamental part of this project from start to end, because this technology has a lot of applications and leads in this field. Not only have been simulated all the elements of this antenna but also have been built to compare both simulations and measurements.

Analysis and suppression of reflections in far-field antenna measurement ranges

This paper presents the analysis of the reflections in two kind of spherical far field ranges: one if the classical acquisition where the AUT is rotated and the second one corresponds to the systems where the AUT is fixed and the antenna probe is rotated. In large far field systems this is not possible, but this can be used to the measurement of small antennas, for instance, with the SATIMO StarGate system. In both cases, it is assumed that only one frequency is acquired and the results should be improved cut by cut, in order not to lose the advantages or far field measurements. Finally, some practical results are studied using measurements of one antenna in the outdoor far field facility of LIT INPE in Brazil.

A cyber-physical approach to combined HW-SW monitoring for improving energy efficiency in data centers

High-Performance Computing, Cloud computing and next-generation applications such e-Health or Smart Cities have dramatically increased the computational demand of Data Centers. The huge energy consumption, increasing levels of CO2 and the economic costs of these facilities represent a challenge for industry and researchers alike. Recent research trends propose the usage of holistic optimization techniques to jointly minimize Data Center computational and cooling costs from a multilevel perspective. This paper presents an analysis on the parameters needed to integrate the Data Center in a holistic optimization framework and leverages the usage of Cyber-Physical systems to gather workload, server and environmental data via software techniques and by deploying a non-intrusive Wireless Sensor Net- work (WSN). This solution tackles data sampling, retrieval and storage from a reconfigurable perspective, reducing the amount of data generated for optimization by a 68% without information loss, doubling the lifetime of the WSN nodes and allowing runtime energy minimization techniques in a real scenario.

A scalable evolvable hardware processing array

Evolvable hardware (EH) is an interesting alternative to conventional digital circuit design, since autonomous generation of solutions for a given task permits self-adaptivity of the system to changing environments, and they present inherent fault tolerance when evolution is intrinsically performed. Systems based on FPGAs that use Dynamic and Partial Reconfiguration (DPR) for evolving the circuit are an example. Also, thanks to DPR, these systems can be provided with scalability, a feature that allows a system to change the number of allocated resources at run-time in order to vary some feature, such as performance. The combination of both aspects leads to scalable evolvable hardware (SEH), which changes in size as an extra degree of freedom when trying to achieve the optimal solution by means of evolution. The main contributions of this paper are an architecture of a scalable and evolvable hardware processing array system, some preliminary evolution strategies which take scalability into consideration, and to show in the experimental results the benefits of combined evolution and scalability. A digital image filtering application is used as use case.