Impact of Impurities on the Mechanical Strength of Multicrystalline Silicon

The usage of more inexpensive silicon feedstock for crystallizing mc-Si blocks promises cost reduction for the photovoltaic market. For example, less expensive substrates of upgraded metallurgical silicon (UMG-Si) are used as a mechanical support for the epitaxial solar cell. This feedstock has higher content of impurities which influences cell performance and mechanical strength of the wafers. Thus, it is of importance to know these effects in order to know which impurities should be preferentially removed or prevented during the crystallization process. Metals like aluminum (Al) can decrease the mechanical strength due to micro-cracking of the silicon matrix and introduction of high values of thermal residual stress. Additionally, silicon oxide (SiOx) lowers the mechanical strength of mc-Si due to thermal residual stresses and stress intensification when an external load is applied in the surrounding of the particle. Silicon carbide (SiC) introduces thermal residual stresses and intensifies slightly the stress in the surrounding of the particle but can have a toughening effect on the silicon matrix. Finally, silicon nitride (Si3N4) does not influence significantly the mechanical strength of mc- Si and can have a toughening effect on the silicon matrix.

Detector de banda ultraancha en tecnología microstrip hasta 40 GHz

Detectors designing is a key aspect for the development of the new millimeter wave systems. In this paper two detectors in microstrip technology are presented. They use zero bias Schottky diodes to detect signals from low frequency to 40 GHz. High sensibility, flat frequency response and ultrabroadband are the main features of these designs. They are also cheap and easy to mount because they have been built using microstrip technology. This paper explains most technological questions which must be taken into account to design such detectors.

High isolation series-shunt photoconductive microwave switch

This article presents a wide band compact high isolation photoconductive switch, which is based on the series-shunt switch design with three photoconductive switches made of diced high-resistivity silicon wafer placed over a microstrip gap and activated by 808-nm near-infrared laser diodes. The switch shows an insertion loss of 1.2 dB and an isolation of 44.8 dB at 2 GHz. It is easy to operate and control by light, high-speed, electromagnetically transparent and it does not require any biasing circuits.

Influence of high aluminium content on the mechanical properties of directionally solidified multicrystalline silicon

The purpose of this research is the mechanical characterisation of multicrystalline silicon crystallised from silicon feedstock with a high content of aluminium for photovoltaic applications. The mechanical strength, fracture toughness and elastic modulus were measured at different positions within the multicrystalline silicon block to quantify the impact of the segregation of impurities on these mechanical properties. Aluminium segregated to the top of the block and caused extensive micro-cracking of the silicon matrix due to the thermal mismatch between silicon and the aluminium inclusions. Silicon nitride inclusions reduced the fracture toughness and caused failure by radial cracking in its surroundings due to its thermal mismatch with silicon. However, silicon carbide increased the fracture toughness and elastic modulus of silicon.

Silicon nanopillar arrays with SiO2 overlayer for biosensing application

We present the fabrication of silicon dioxide (SiO2) coated silicon nanopillar array structures and demonstrate their application as sensitive optical biosensors. Colloidal lithography, plasma dry etching and deposition processes are used to fabricate SiO2 coated Si nanopillar arrays with two different diameters and periods. Proof of concept bio recognition experiments are carried out with the bovine serum albumin (BSA)/antiBSA model system using Fourier transform visible and IR spectrometry (FT-VIS-IR) in reflection mode. A limit of detection (LoD) value of 5.2 ng/ml is estimated taking in to account the wavenumber uncertainty in the measurements.

MOVPE growth of III-V semiconductors on silicon for third generation solar cells

Esta Tesis trata sobre el desarrollo y crecimiento -mediante tecnología MOVPE (del inglés: MetalOrganic Vapor Phase Epitaxy)- de células solares híbridas de semiconductores III-V sobre substratos de silicio. Esta integración pretende ofrecer una alternativa a las células actuales de III-V, que, si bien ostentan el récord de eficiencia en dispositivos fotovoltaicos, su coste es, a día de hoy, demasiado elevado para ser económicamente competitivo frente a las células convencionales de silicio. De este modo, este proyecto trata de conjugar el potencial de alta eficiencia ya demostrado por los semiconductores III-V en arquitecturas de células fotovoltaicas multiunión con el bajo coste, la disponibilidad y la abundancia del silicio. La integración de semiconductores III-V sobre substratos de silicio puede afrontarse a través de diferentes aproximaciones. En esta Tesis se ha optado por el desarrollo de células solares metamórficas de doble unión de GaAsP/Si. Mediante esta técnica, la transición entre los parámetros de red de ambos materiales se consigue por medio de la formación de defectos cristalográficos (mayoritariamente dislocaciones). La idea es confinar estos defectos durante el crecimiento de sucesivas capas graduales en composición para que la superficie final tenga, por un lado, una buena calidad estructural, y por otro, un parámetro de red adecuado. Numerosos grupos de investigación han dirigido sus esfuerzos en los últimos años en desarrollar una estructura similar a la que aquí proponemos. La mayoría de éstos se han centrado en entender los retos asociados al crecimiento de materiales III-V, con el fin de conseguir un material de alta calidad cristalográfica. Sin embargo, prácticamente ninguno de estos grupos ha prestado especial atención al desarrollo y optimización de la célula inferior de silicio, cuyo papel va a ser de gran relevancia en el funcionamiento de la célula completa. De esta forma, y con el fin de completar el trabajo hecho hasta el momento en el desarrollo de células de III-V sobre silicio, la presente Tesis se centra, fundamentalmente, en el diseño y optimización de la célula inferior de silicio, para extraer su máximo potencial. Este trabajo se ha estructurado en seis capítulos, ordenados de acuerdo al desarrollo natural de la célula inferior. Tras un capítulo de introducción al crecimiento de semiconductores III-V sobre Si, en el que se describen las diferentes alternativas para su integración; nos ocupamos de la parte experimental, comenzando con una extensa descripción y caracterización de los substratos de silicio. De este modo, en el Capítulo 2 se analizan con exhaustividad los diferentes tratamientos (tanto químicos como térmicos) que deben seguir éstos para garantizar una superficie óptima sobre la que crecer epitaxialmente el resto de la estructura. Ya centrados en el diseño de la célula inferior, el Capítulo 3 aborda la formación de la unión p-n. En primer lugar se analiza qué configuración de emisor (en términos de dopaje y espesor) es la más adecuada para sacar el máximo rendimiento de la célula inferior. En este primer estudio se compara entre las diferentes alternativas existentes para la creación del emisor, evaluando las ventajas e inconvenientes que cada aproximación ofrece frente al resto. Tras ello, se presenta un modelo teórico capaz de simular el proceso de difusión de fosforo en silicio en un entorno MOVPE por medio del software Silvaco. Mediante este modelo teórico podemos determinar qué condiciones experimentales son necesarias para conseguir un emisor con el diseño seleccionado. Finalmente, estos modelos serán validados y constatados experimentalmente mediante la caracterización por técnicas analíticas (i.e. ECV o SIMS) de uniones p-n con emisores difundidos. Uno de los principales problemas asociados a la formación del emisor por difusión de fósforo, es la degradación superficial del substrato como consecuencia de su exposición a grandes concentraciones de fosfina (fuente de fósforo). En efecto, la rugosidad del silicio debe ser minuciosamente controlada, puesto que éste servirá de base para el posterior crecimiento epitaxial y por tanto debe presentar una superficie prístina para evitar una degradación morfológica y cristalográfica de las capas superiores. En este sentido, el Capítulo 4 incluye un análisis exhaustivo sobre la degradación morfológica de los substratos de silicio durante la formación del emisor. Además, se proponen diferentes alternativas para la recuperación de la superficie con el fin de conseguir rugosidades sub-nanométricas, que no comprometan la calidad del crecimiento epitaxial. Finalmente, a través de desarrollos teóricos, se establecerá una correlación entre la degradación morfológica (observada experimentalmente) con el perfil de difusión del fósforo en el silicio y por tanto, con las características del emisor. Una vez concluida la formación de la unión p-n propiamente dicha, se abordan los problemas relacionados con el crecimiento de la capa de nucleación de GaP. Por un lado, esta capa será la encargada de pasivar la subcélula de silicio, por lo que su crecimiento debe ser regular y homogéneo para que la superficie de silicio quede totalmente pasivada, de tal forma que la velocidad de recombinación superficial en la interfaz GaP/Si sea mínima. Por otro lado, su crecimiento debe ser tal que minimice la aparición de los defectos típicos de una heteroepitaxia de una capa polar sobre un substrato no polar -denominados dominios de antifase-. En el Capítulo 5 se exploran diferentes rutinas de nucleación, dentro del gran abanico de posibilidades existentes, para conseguir una capa de GaP con una buena calidad morfológica y estructural, que será analizada mediante diversas técnicas de caracterización microscópicas. La última parte de esta Tesis está dedicada al estudio de las propiedades fotovoltaicas de la célula inferior. En ella se analiza la evolución de los tiempos de vida de portadores minoritarios de la base durante dos etapas claves en el desarrollo de la estructura Ill-V/Si: la formación de la célula inferior y el crecimiento de las capas III-V. Este estudio se ha llevado a cabo en colaboración con la Universidad de Ohio, que cuentan con una gran experiencia en el crecimiento de materiales III-V sobre silicio. Esta tesis concluye destacando las conclusiones globales del trabajo realizado y proponiendo diversas líneas de trabajo a emprender en el futuro. ABSTRACT This thesis pursues the development and growth of hybrid solar cells -through Metal Organic Vapor Phase Epitaxy (MOVPE)- formed by III-V semiconductors on silicon substrates. This integration aims to provide an alternative to current III-V cells, which, despite hold the efficiency record for photovoltaic devices, their cost is, today, too high to be economically competitive to conventional silicon cells. Accordingly, the target of this project is to link the already demonstrated efficiency potential of III-V semiconductor multijunction solar cell architectures with the low cost and unconstrained availability of silicon substrates. Within the existing alternatives for the integration of III-V semiconductors on silicon substrates, this thesis is based on the metamorphic approach for the development of GaAsP/Si dual-junction solar cells. In this approach, the accommodation of the lattice mismatch is handle through the appearance of crystallographic defects (namely dislocations), which will be confined through the incorporation of a graded buffer layer. The resulting surface will have, on the one hand a good structural quality; and on the other hand the desired lattice parameter. Different research groups have been working in the last years in a structure similar to the one here described, being most of their efforts directed towards the optimization of the heteroepitaxial growth of III-V compounds on Si, with the primary goal of minimizing the appearance of crystal defects. However, none of these groups has paid much attention to the development and optimization of the bottom silicon cell, which, indeed, will play an important role on the overall solar cell performance. In this respect, the idea of this thesis is to complete the work done so far in this field by focusing on the design and optimization of the bottom silicon cell, to harness its efficiency. This work is divided into six chapters, organized according to the natural progress of the bottom cell development. After a brief introduction to the growth of III-V semiconductors on Si substrates, pointing out the different alternatives for their integration; we move to the experimental part, which is initiated by an extensive description and characterization of silicon substrates -the base of the III-V structure-. In this chapter, a comprehensive analysis of the different treatments (chemical and thermal) required for preparing silicon surfaces for subsequent epitaxial growth is presented. Next step on the development of the bottom cell is the formation of the p-n junction itself, which is faced in Chapter 3. Firstly, the optimization of the emitter configuration (in terms of doping and thickness) is handling by analytic models. This study includes a comparison between the different alternatives for the emitter formation, evaluating the advantages and disadvantages of each approach. After the theoretical design of the emitter, it is defined (through the modeling of the P-in-Si diffusion process) a practical parameter space for the experimental implementation of this emitter configuration. The characterization of these emitters through different analytical tools (i.e. ECV or SIMS) will validate and provide experimental support for the theoretical models. A side effect of the formation of the emitter by P diffusion is the roughening of the Si surface. Accordingly, once the p-n junction is formed, it is necessary to ensure that the Si surface is smooth enough and clean for subsequent phases. Indeed, the roughness of the Si must be carefully controlled since it will be the basis for the epitaxial growth. Accordingly, after quantifying (experimentally and by theoretical models) the impact of the phosphorus on the silicon surface morphology, different alternatives for the recovery of the surface are proposed in order to achieve a sub-nanometer roughness which does not endanger the quality of the incoming III-V layers. Moving a step further in the development of the Ill-V/Si structure implies to address the challenges associated to the GaP on Si nucleation. On the one hand, this layer will provide surface passivation to the emitter. In this sense, the growth of the III-V layer must be homogeneous and continuous so the Si emitter gets fully passivated, providing a minimal surface recombination velocity at the interface. On the other hand, the growth should be such that the appearance of typical defects related to the growth of a polar layer on a non-polar substrate is minimized. Chapter 5 includes an exhaustive study of the GaP on Si nucleation process, exploring different nucleation routines for achieving a high morphological and structural quality, which will be characterized by means of different microscopy techniques. Finally, an extensive study of the photovoltaic properties of the bottom cell and its evolution during key phases in the fabrication of a MOCVD-grown III-V-on-Si epitaxial structure (i.e. the formation of the bottom cell; and the growth of III-V layers) will be presented in the last part of this thesis. This study was conducted in collaboration with The Ohio State University, who has extensive experience in the growth of III-V materials on silicon. This thesis concludes by highlighting the overall conclusions of the presented work and proposing different lines of work to be undertaken in the future.

Ellipsometric study of nematic alignment on silicon oxides for display

Vertical Alignment Nematics (VANs) displays are a form of LCDs in which the liquid crystals naturally align vertically to the glass substrates. In spite of their name, the liquid crystal (LC) director is never exactly vertical, rather it always show a small angle with the normal to the sample plane called tilt that may vary throughout the cell bulk. Its values are ultimately determined by the pretilt, defined as the tilt angle on the surfaces in the absence of voltage.

Silicon micromachined waveguide components at 0.75 to 1.1 THz

Silicon micromachined waveguide components operating in the WM-250 (WR-1) waveguide band (0.75 to 1.1 THz) are measured. Through lines are used to characterize the waveguide loss with and without an oxide etch to reduce the surface roughness. A sidewall roughness of 100nm is achieved, enabling a waveguide loss of 0.2dB/mm. A 1THz band-pass filter is also measured to characterize the precision of fabrication process. A 1.8% shift in frequency is observed and can be accounted for by the 0.5deg etch angle and 2um expansion of the features by the oxide etch. The measured filter has a 13% 3dB bandwidth and 2.5dB insertion loss through the passband.

A Linked Data Platform adapter for the Bugzilla issue tracker

The W3C Linked Data Platform (LDP) specification defines a standard HTTP-based protocol for read/write Linked Data and pro- vides the basis for application integration using Linked Data. This paper presents an LDP adapter for the Bugzilla issue tracker and demonstrates how to use the LDP protocol to expose a traditional application as a read/write Linked Data application. This approach provides a exible LDP adoption strategy with minimal changes to existing applications.

Diseño de una red de división / combinación de potencia de N-puertos sobre una octava en banda X mediante divisores Wilkinson multietapa y asimétricos implementados en tecnología Microstrip

Se muestra el proceso de diseño y medida de una red de división/combinación de potencia de gran ancho de banda (5 a 10 GHz) basado en divisores de potencia Wilkinson asimétricos y multi-sección. Se comparan las ventajas e inconvenientes de las distintas formas de conectar los divisores de potencia, proponiendo un diseño general que depende de la tecnología de fabricación que se disponga. Se detalla el proceso de diseño de los divisores de potencia del circuito, así como las estrategias a seguir para plasmar los parámetros del circuito en un modelo de simulación,mostrando los problemas que surgen y las soluciones que se tomaron. Finalmente se muestran las medidas el circuito fabricado, comparando su respuesta con la de la simulación.

Silicon oxides as alignment surfaces for vertically-aligned nematics in photonic devices

A comparative study on alignment performance and microstructure of inorganic layers used for liquid crystal cell conditioning has been carried out. The study has focused on two specific materials, SiOx and SiO2, deposited under different conditions. The purpose was to establish a relationship between layer microstructure and liquid crystal alignment. The surface morphology has been studied by FESEM and AFM. An analysis on liquid crystal alignment, pretilt angle, response time, contrast ratio and the conditions to develop backflow effect (significant rise time increase due to pure homeotropic alignment) on vertically-aligned nematic cells has been carried out. A technique to overcome the presence of backflow has been identified. The full comparative study of SiOx and SiO2 layer properties and their influence over liquid crystal alignment and electrooptic response is presented.

Improving the pass-band return loss in liquid crystal dual-mode bandpass filters by microstrip patch reshaping

In this paper, the design and experimental characterization of a tunable microstrip bandpass filter based on liquid crystal technology are presented. A reshaped microstrip dual-mode filter structure has been used in order to improve the device performance. Specifically, the aim is to increase the pass-band return loss of the filter by narrowing the filter bandwidth. Simulations confirm the improvement of using this new structure, achieving a pass-band return loss increase of 1.5 dB at least. Because of the anisotropic properties of LC molecules, a filter central frequency shift from 4.688 GHz to 5.045 GHz, which means a relative tuning range of 7.3%, is measured when an external AC voltage from 0 Vrms to 15 Vrms is applied to the device.

Impact of metal-organic vapor phase epitaxy environment on silicon bulk lifetime for III–V-on-Si multijunction solar cells

With the final goal of integrating III-V materials on silicon substrates for tandem solar cells, the influence of the Metal-Organic Vapor Phase Epitaxy (MOVPE) environment on the minority carrier properties of silicon wafers has been evaluated. These properties will essentially determine the photovoltaic performance of the bottom cell in a III-V-on-Si tandem solar cell. A comparison of the base minority carrier lifetimes obtained for different thermal processes carried out in a MOVPE reactor on Czochralski silicon wafers has been carried out. An important degradation of minority carrier lifetime during the surface preparation (i.e. H2 anneal) has been observed. Three different mechanisms have been proposed for explaining this behavior: 1) the introduction of extrinsic impurities coming from the reactor; 2) the activation of intrinsic lifetime killing impurities coming from the wafer itself; and finally, 3) the formation of crystal defects, which eventually become recombination centers. The effect of the emitter formation by phosphorus diffusion has also been evaluated. In this sense, it has been reported that lifetime can be recovered during the emitter formation either by the effect of the P on extracting impurities, or by the role of the atomic hydrogen on passivating the defects.

New strategies in laser processing of TCOs for light management improvement in thin-film silicon solar cells

Light confinement strategies play a crucial role in the performance of thin-film (TF) silicon solar cells. One way to reduce the optical losses is the texturing of the transparent conductive oxide (TCO) that acts as the front contact. Other losses arise from the mismatch between the incident light spectrum and the spectral properties of the absorbent material that imply that low energy photons (below the bandgap value) are not absorbed, and therefore can not generate photocurrent. Up-conversion techniques, in which two sub-bandgap photons are combined to give one photon with a better matching with the bandgap, were proposed to overcome this problem. In particular, this work studies two strategies to improve light management in thin film silicon solar cells using laser technology. The first one addresses the problem of TCO surface texturing using fully commercial fast and ultrafast solid state laser sources. Aluminum doped Zinc Oxide (AZO) samples were laser processed and the results were optically evaluated by measuring the haze factor of the treated samples. As a second strategy, laser annealing experiments of TCOs doped with rare earth ions are presented as a potential process to produce layers with up-conversion properties, opening the possibility of its potential use in high efficiency solar cells.

Silicon PV module customization using laser technology for new BIPV applications

It is well known that lasers have helped to increase efficiency and to reduce production costs in the photovoltaic (PV) sector in the last two decades, appearing in most cases as the ideal tool to solve some of the critical bottlenecks of production both in thin film (TF) and crystalline silicon (c-Si) technologies. The accumulated experience in these fields has brought as a consequence the possibility of using laser technology to produce new Building Integrated Photovoltaics (BIPV) products with a high degree of customization. However, to produce efficiently these personalized products it is necessary the development of optimized laser processes able to transform standard products in customized items oriented to the BIPV market. In particular, the production of semitransparencies and/or freeform geometries in TF a-Si modules and standard c-Si modules is an application of great interest in this market. In this work we present results of customization of both TF a-Si modules and standard monocrystalline (m-Si) and policrystalline silicon (pc-Si) modules using laser ablation and laser cutting processes. A discussion about the laser processes parameterization to guarantee the functionality of the device is included. Finally some examples of final devices are presented with a full discussion of the process approach used in their fabrication.