High-Speed Rail Versus Air Transportation: Case Study of Madrid–Barcelona, Spain.

Travel time savings, better quality of the supplied services, greater comfort for the users, and improved accessibility are the main factors of success of High Speed Rail(HSR)links. This paper presents the results from a revealed and stated preference survey conducted to both HSR and air transport users in the Madrid Barcelona corridor. The data gathered from the stated preference survey was used to calibrate a modal choice model aiming at explaining competition between HSR and air transportation in the corridor. From the model, the authors obtain that prices and service frequency are the most important variables to compete with the other mode. In addition, they found that check-in and security controls at the airport are a crucial variable for the users in their modal choice. Other policies, such as the improvement of parking facilities at the train stations, play a secondary role.

Coupled models for the dynamics of bridges under high-speed rail traffic

The dynamic effects of high-speed trains on viaducts are important issues for the design of the structures, as well as for determining safe running conditions of trains. In this work we start by reviewing the relevance of some basic moving load models for the dynamic action of vertical traffic loads. The study of lateral dynamics of running trains on bridges is of importance mainly for the safety of the traffic, and may be relevant for laterally compliant bridges. These studies require 3D coupled vehicle-bridge models and consideration of wheel to rail contact. We describe here a fully nonlinear coupled model, formulated in absolute coordinates and incorporated into a commercial finite element framework. An application example is presented for a vehicle subject to a strong wind gust traversing a bridge, showing the relevance of the nonlinear wheel-rail contact model as well as the interaction between bridge and vehicle.

Mechanical Characterization of Lead-Free Sn-Ag-Cu Solder Joints by High-Temperature Nanoindentation

The reliability of Pb-free solder joints is controlled by their microstructural constituents. Therefore, knowledge of the solder microconstituents’ mechanical properties as a function of temperature is required. Sn-Ag-Cu lead-free solder alloy contains three phases: a Sn-rich phase, and the intermetallic compounds (IMCs) Cu6Sn5 and Ag3Sn. Typically, the Sn-rich phase is surrounded by a eutectic mixture of β-Sn, Cu6Sn5, and Ag3Sn. In this paper, we report on the Young’s modulus and hardness of the Cu6Sn5 and Cu3Sn IMCs, the β-Sn phase, and the eutectic compound, as measured by nanoindentation at elevated temperatures. For both the β-Sn phase and the eutectic compound, the hardness and Young’s modulus exhibited strong temperature dependence. In the case of the intermetallics, this temperature dependence is observed for Cu6Sn5, but the mechanical properties of Cu3Sn are more stable up to 200°C.

Some theoretical aspects in computational analysis of adhesive lap joints

This paper is devoted to the numerical analysis of bidimensional bonded lap joints. For this purpose, the stress singularities occurring at the intersections of the adherend-adhesive interfaces with the free edges are first investigated and a method for computing both the order and the intensity factor of these singularities is described briefly. After that, a simplified model, in which the adhesive domain is reduced to a line, is derived by using an asymptotic expansion method. Then, assuming that the assembly debonding is produced by a macro-crack propagation in the adhesive, the associated energy release rate is computed. Finally, a homogenization technique is used in order to take into account a preliminary adhesive damage consisting of periodic micro-cracks. Some numerical results are presented.

High-speed rail systems and tourists´ destination choice: the case studies of Paris and Madrid

The analysis of how tourists select their holiday destinations along with the factors determining their choices is very important for promoting tourism. In particular, transportation is supposed to have a great influence on the tourists’ decisions. The aim of this paper is to investigate the role of High Speed Rail (HSR) systems with respect to a destination choice. Two key tourist destinations in Europe namely Paris, and Madrid, have been chosen to identify the factors influencing this choice. On the basis of two surveys to obtain information from tourists, it has been found that the presence of architectural sites, the promotion quality of the destination itself, and the cultural and social events have an impact when making a destination choice. However the availability of the HSR systems affects the choice of Paris and Madrid as tourist destinations in a different way. For Paris, TGV is considered a real transport mode alternative among tourists. On the other hand, Madrid is chosen by tourists irrespective of the presence of an efficient HSR network. Data collected from the two surveys have been used for a further quantitative analysis. Regression models have been specified and parameters have been calibrated to identify the factors influencing holidaymakers to revisit Paris and Madrid and visit other tourist places accessible by HSR from these capitals

Optimum adhesive thickness in structural adhesives joints using statistical techniques base on Weibull distribution

The geometrical factors defining an adhesive joint are of great importance as its design greatly conditions the performance of the bonding. One of the most relevant geometrical factors is the thickness of the adhesive as it decisively influences the mechanical properties of the bonding and has a clear economic impact on the manufacturing processes or long runs. The traditional mechanical joints (riveting, welding, etc.) are characterised by a predictable performance, and are very reliable in service conditions. Thus, structural adhesive joints will only be selected in industrial applications demanding mechanical requirements and adverse environmental conditions if the suitable reliability (the same or higher than the mechanical joints) is guaranteed. For this purpose, the objective of this paper is to analyse the influence of the adhesive thickness on the mechanical behaviour of the joint and, by means of a statistical analysis based on Weibull distribution, propose the optimum thickness for the adhesive combining the best mechanical performance and high reliability. This procedure, which is applicable without a great deal of difficulty to other joints and adhesives, provides a general use for a more reliable use of adhesive bondings and, therefore, for a better and wider use in the industrial manufacturing processes.

The Dynamics of High-Speed Railway Bridges: A Review of Design Issues and New Research for Lateral Dynamics

The dynamic effects of high-speed trains on viaducts are important issues for the design of the structures, as well as for the consideration of safe running conditions for the trains. In this work we start by reviewing the relevance of some basic design aspects. The significance of impact factor envelopes for moving loads is considered first. Resonance which may be achieved for high-speed trains requires dynamic analysis, for which some key aspects are discussed. The relevance of performing a longitudinal distribution of axle loads, the number of modes taken in analysis, and the consideration of vehicle-structure interaction are discussed with representative examples. The lateral dynamic effects of running trains on bridges is of importance for laterally compliant viaducts, such as some very tall structures erected in new high-speed lines. The relevance of this study is mainly for the safety of the traffic, considering both internal actions such as the hunting motion as well as external actions such as wind or earthquakes [1]. These studies require three-dimensional dynamic coupled vehicle-bridge models, and consideration of wheel to rail contact, a phenomenon which is complex and costly to model in detail. We describe here a fully nonlinear coupled model, described in absolute coordinates and incorporated into a commercial finite element framework [2]. The wheel-rail contact has been considered using a FastSim algorithm which provides a compromise between accuracy and computational cost, and captures the main nonlinear response of the contact interface. Two applications are presented, firstly to a vehicle subject to a strong wind gust traversing a bridge, showing the relevance of the nonlinear wheel-rail contact model as well as the dynamic interaction between bridge and vehicle. The second application is to a real HS viaduct with a long continuous deck and tall piers and high lateral compliance [3]. The results show the safety of the traffic as well as the importance of considering features such as track alignment irregularities.

Wheel-Rail Contact Forces in High-Speed Simply Supported Bridges at Resonance

The response of high-speed bridges at resonance, particularly under flexural vibrations, constitutes a subject of research for many scientists and engineers at the moment. The topic is of great interest because, as a matter of fact, such kind of behaviour is not unlikely to happen due to the elevated operating speeds of modern rains, which in many cases are equal to or even exceed 300 km/h ( [1,2]). The present paper addresses the subject of the evolution of the wheel-rail contact forces during resonance situations in simply supported bridges. Based on a dimensionless formulation of the equations of motion presented in [4], very similar to the one introduced by Klasztorny and Langer in [3], a parametric study is conducted and the contact forces in realistic situations analysed in detail. The effects of rail and wheel irregularities are not included in the model. The bridge is idealised as an Euler-Bernoulli beam, while the train is simulated by a system consisting of rigid bodies, springs and dampers. The situations such that a severe reduction of the contact force could take place are identified and compared with typical situations in actual bridges. To this end, the simply supported bridge is excited at resonace by means of a theoretical train consisting of 15 equidistant axles. The mechanical characteristics of all axles (unsprung mass, semi-sprung mass, and primary suspension system) are identical. This theoretical train permits the identification of the key parameters having an influence on the wheel-rail contact forces. In addition, a real case of a 17.5 m bridges traversed by the Eurostar train is analysed and checked against the theoretical results. The influence of three fundamental parameters is investigated in great detail: a) the ratio of the fundamental frequency of the bridge and natural frequency of the primary suspension of the vehicle; b) the ratio of the total mass of the bridge and the semi-sprung mass of the vehicle and c) the ratio between the length of the bridge and the characteristic distance between consecutive axles. The main conclusions derived from the investigation are: The wheel-rail contact forces undergo oscillations during the passage of the axles over the bridge. During resonance, these oscillations are more severe for the rear wheels than for the front ones. If denotes the span of a simply supported bridge, and the characteristic distance between consecutive groups of loads, the lower the value of , the greater the oscillations of the contact forces at resonance. For or greater, no likelihood of loss of wheel-rail contact has been detected. The ratio between the frequency of the primary suspension of the vehicle and the fundamental frequency of the bridge is denoted by (frequency ratio), and the ratio of the semi-sprung mass of the vehicle (mass of the bogie) and the total mass of the bridge is denoted by (mass ratio). For any given frequency ratio, the greater the mass ratio, the greater the oscillations of the contact forces at resonance. The oscillations of the contact forces at resonance, and therefore the likelihood of loss of wheel-rail contact, present a minimum for approximately between 0.5 and 1. For lower or higher values of the frequency ratio the oscillations of the contact forces increase. Neglecting the possible effects of torsional vibrations, the metal or composite bridges with a low linear mass have been found to be the ones where the contact forces may suffer the most severe oscillations. If single-track, simply supported, composite or metal bridges were used in high-speed lines, and damping ratios below 1% were expected, the minimum contact forces at resonance could drop to dangerous values. Nevertheless, this kind of structures is very unusual in modern high-speed railway lines.

Analysis of lateral dynamics of railway vehicles on viaducts with coupled models

The study of lateral dynamics of running trains on bridges is of importance mainly for the safety of the traffic, and may be relevant for laterally compliant bridges. These studies require 3D coupled vehicle-bridge models, and consideration of wheel to rail contact, a phenomenon which is complex and costly to model in detail. We describe here a fully nonlinear coupled model, described in absolute coordinates and incorporated into a commercial finite element framework. Two applications are presented, firstly to a vehicle subject to a strong wind gust traversing a br idge, showing the relevance of the nonlinear wheel-rail contact model as well as the interaction between bridge and vehicle. The second application is to a real viaduct in a high-speed line, with a long continuous deck and tall piers with high lateral compliance. The results show the safety of the traffic as well as the relevance of considering the wind action and the nonlinear response.

Vulnerability analysis of RC buildings with wide beams located in moderate seismicity regions

A significant number of short-to-mid height RC buildings with wide beams have been constructed in areas of moderate seismicity of Spain, mainly for housing and administrative use. The buildings have a framed structure with one-way slabs; the wide beams constitute the distinctive characteristic, their depth being equal to that of the rest of the slab, thus providing a flat lower surface, convenient for construction and the layout of facilities. Seismic behavior in the direction of the wide beams appears to be deficient because of: (i) low lateral strength, mainly because of the small effective depth of the beams, (ii) inherent low ductility of the wide beams, generated by high amount of reinforcement, (iii) the big strut compressive forces developed inside the column-beam connections due to the low height of the beams, and (iv) the fact that the wide beams are wider than the columns, meaning that the contribution of the outer zones to the resistance of the beam-column joints is unreliable because there is no torsion reinforcement. In the orthogonal direction, the behavior is worse since the only members of the slabs that contribute to the lateral resistance are the joists and the façade beams. Moreover, these buildings were designed with codes that did not include ductility requirements and required only a low lateral resistance; indeed, in many cases, seismic action was not considered at all. Consequently, the seismic capacity of these structures is not reliable. The objective of this research is to assess numerically this capability, whereas further research will aim to propose retrofit strategies. The research approach consists of: (i) selecting a number of 3-story and 6-story buildings that represent the vast majority of the existing ones and (ii) evaluating their vulnerability through three types of analyses, namely: code-type, push-over and nonlinear dynamic analysis. Given the low lateral resistance of the main frames, the cooperation of the masonry infill walls is accounted for; for each representative building, three wall densities are considered. The results of the analyses show that the buildings in question exhibit inadequate seismic behavior in most of the examined situations. In general, the relative performance is less deficient for Target Drift CP (Collapse Prevention) than for IO (Immediate Occupancy). Since these buildings are selected to be representative of the vast majority of buildings with wide beams that were constructed in Spain without accounting for any seismic consideration, our conclusions can be extrapolated to a broader scenario.

Side-Channel Attack Protection Techniques in FPGA Systems using Enhanced Dual-Rail Solutions

Esta tesis doctoral se centra principalmente en técnicas de ataque y contramedidas relacionadas con ataques de canal lateral (SCA por sus siglas en inglés), que han sido propuestas dentro del campo de investigación académica desde hace 17 años. Las investigaciones relacionadas han experimentado un notable crecimiento en las últimas décadas, mientras que los diseños enfocados en la protección sólida y eficaz contra dichos ataques aún se mantienen como un tema de investigación abierto, en el que se necesitan iniciativas más confiables para la protección de la información persona de empresa y de datos nacionales. El primer uso documentado de codificación secreta se remonta a alrededor de 1700 B.C., cuando los jeroglíficos del antiguo Egipto eran descritos en las inscripciones. La seguridad de la información siempre ha supuesto un factor clave en la transmisión de datos relacionados con inteligencia diplomática o militar. Debido a la evolución rápida de las técnicas modernas de comunicación, soluciones de cifrado se incorporaron por primera vez para garantizar la seguridad, integridad y confidencialidad de los contextos de transmisión a través de cables sin seguridad o medios inalámbricos. Debido a las restricciones de potencia de cálculo antes de la era del ordenador, la técnica de cifrado simple era un método más que suficiente para ocultar la información. Sin embargo, algunas vulnerabilidades algorítmicas pueden ser explotadas para restaurar la regla de codificación sin mucho esfuerzo. Esto ha motivado nuevas investigaciones en el área de la criptografía, con el fin de proteger el sistema de información ante sofisticados algoritmos. Con la invención de los ordenadores se ha acelerado en gran medida la implementación de criptografía segura, que ofrece resistencia eficiente encaminada a obtener mayores capacidades de computación altamente reforzadas. Igualmente, sofisticados cripto-análisis han impulsado las tecnologías de computación. Hoy en día, el mundo de la información ha estado involucrado con el campo de la criptografía, enfocada a proteger cualquier campo a través de diversas soluciones de cifrado. Estos enfoques se han fortalecido debido a la unificación optimizada de teorías matemáticas modernas y prácticas eficaces de hardware, siendo posible su implementación en varias plataformas (microprocesador, ASIC, FPGA, etc.). Las necesidades y requisitos de seguridad en la industria son las principales métricas de conducción en el diseño electrónico, con el objetivo de promover la fabricación de productos de gran alcance sin sacrificar la seguridad de los clientes. Sin embargo, una vulnerabilidad en la implementación práctica encontrada por el Prof. Paul Kocher, et al en 1996 implica que un circuito digital es inherentemente vulnerable a un ataque no convencional, lo cual fue nombrado posteriormente como ataque de canal lateral, debido a su fuente de análisis. Sin embargo, algunas críticas sobre los algoritmos criptográficos teóricamente seguros surgieron casi inmediatamente después de este descubrimiento. En este sentido, los circuitos digitales consisten típicamente en un gran número de celdas lógicas fundamentales (como MOS - Metal Oxide Semiconductor), construido sobre un sustrato de silicio durante la fabricación. La lógica de los circuitos se realiza en función de las innumerables conmutaciones de estas células. Este mecanismo provoca inevitablemente cierta emanación física especial que puede ser medida y correlacionada con el comportamiento interno del circuito. SCA se puede utilizar para revelar datos confidenciales (por ejemplo, la criptografía de claves), analizar la arquitectura lógica, el tiempo e incluso inyectar fallos malintencionados a los circuitos que se implementan en sistemas embebidos, como FPGAs, ASICs, o tarjetas inteligentes. Mediante el uso de la comparación de correlación entre la cantidad de fuga estimada y las fugas medidas de forma real, información confidencial puede ser reconstruida en mucho menos tiempo y computación. Para ser precisos, SCA básicamente cubre una amplia gama de tipos de ataques, como los análisis de consumo de energía y radiación ElectroMagnética (EM). Ambos se basan en análisis estadístico y, por lo tanto, requieren numerosas muestras. Los algoritmos de cifrado no están intrínsecamente preparados para ser resistentes ante SCA. Es por ello que se hace necesario durante la implementación de circuitos integrar medidas que permitan camuflar las fugas a través de "canales laterales". Las medidas contra SCA están evolucionando junto con el desarrollo de nuevas técnicas de ataque, así como la continua mejora de los dispositivos electrónicos. Las características físicas requieren contramedidas sobre la capa física, que generalmente se pueden clasificar en soluciones intrínsecas y extrínsecas. Contramedidas extrínsecas se ejecutan para confundir la fuente de ataque mediante la integración de ruido o mala alineación de la actividad interna. Comparativamente, las contramedidas intrínsecas están integradas en el propio algoritmo, para modificar la aplicación con el fin de minimizar las fugas medibles, o incluso hacer que dichas fugas no puedan ser medibles. Ocultación y Enmascaramiento son dos técnicas típicas incluidas en esta categoría. Concretamente, el enmascaramiento se aplica a nivel algorítmico, para alterar los datos intermedios sensibles con una máscara de manera reversible. A diferencia del enmascaramiento lineal, las operaciones no lineales que ampliamente existen en criptografías modernas son difíciles de enmascarar. Dicho método de ocultación, que ha sido verificado como una solución efectiva, comprende principalmente la codificación en doble carril, que está ideado especialmente para aplanar o eliminar la fuga dependiente de dato en potencia o en EM. En esta tesis doctoral, además de la descripción de las metodologías de ataque, se han dedicado grandes esfuerzos sobre la estructura del prototipo de la lógica propuesta, con el fin de realizar investigaciones enfocadas a la seguridad sobre contramedidas de arquitectura a nivel lógico. Una característica de SCA reside en el formato de las fuentes de fugas. Un típico ataque de canal lateral se refiere al análisis basado en la potencia, donde la capacidad fundamental del transistor MOS y otras capacidades parásitas son las fuentes esenciales de fugas. Por lo tanto, una lógica robusta resistente a SCA debe eliminar o mitigar las fugas de estas micro-unidades, como las puertas lógicas básicas, los puertos I/O y las rutas. Las herramientas EDA proporcionadas por los vendedores manipulan la lógica desde un nivel más alto, en lugar de realizarlo desde el nivel de puerta, donde las fugas de canal lateral se manifiestan. Por lo tanto, las implementaciones clásicas apenas satisfacen estas necesidades e inevitablemente atrofian el prototipo. Por todo ello, la implementación de un esquema de diseño personalizado y flexible ha de ser tomado en cuenta. En esta tesis se presenta el diseño y la implementación de una lógica innovadora para contrarrestar SCA, en la que se abordan 3 aspectos fundamentales: I. Se basa en ocultar la estrategia sobre el circuito en doble carril a nivel de puerta para obtener dinámicamente el equilibrio de las fugas en las capas inferiores; II. Esta lógica explota las características de la arquitectura de las FPGAs, para reducir al mínimo el gasto de recursos en la implementación; III. Se apoya en un conjunto de herramientas asistentes personalizadas, incorporadas al flujo genérico de diseño sobre FPGAs, con el fin de manipular los circuitos de forma automática. El kit de herramientas de diseño automático es compatible con la lógica de doble carril propuesta, para facilitar la aplicación práctica sobre la familia de FPGA del fabricante Xilinx. En este sentido, la metodología y las herramientas son flexibles para ser extendido a una amplia gama de aplicaciones en las que se desean obtener restricciones mucho más rígidas y sofisticadas a nivel de puerta o rutado. En esta tesis se realiza un gran esfuerzo para facilitar el proceso de implementación y reparación de lógica de doble carril genérica. La viabilidad de las soluciones propuestas es validada mediante la selección de algoritmos criptográficos ampliamente utilizados, y su evaluación exhaustiva en comparación con soluciones anteriores. Todas las propuestas están respaldadas eficazmente a través de ataques experimentales con el fin de validar las ventajas de seguridad del sistema. El presente trabajo de investigación tiene la intención de cerrar la brecha entre las barreras de implementación y la aplicación efectiva de lógica de doble carril. En esencia, a lo largo de esta tesis se describirá un conjunto de herramientas de implementación para FPGAs que se han desarrollado para trabajar junto con el flujo de diseño genérico de las mismas, con el fin de lograr crear de forma innovadora la lógica de doble carril. Un nuevo enfoque en el ámbito de la seguridad en el cifrado se propone para obtener personalización, automatización y flexibilidad en el prototipo de circuito de bajo nivel con granularidad fina. Las principales contribuciones del presente trabajo de investigación se resumen brevemente a continuación: Lógica de Precharge Absorbed-DPL logic: El uso de la conversión de netlist para reservar LUTs libres para ejecutar la señal de precharge y Ex en una lógica DPL. Posicionamiento entrelazado Row-crossed con pares idénticos de rutado en redes de doble carril, lo que ayuda a aumentar la resistencia frente a la medición EM selectiva y mitigar los impactos de las variaciones de proceso. Ejecución personalizada y herramientas de conversión automática para la generación de redes idénticas para la lógica de doble carril propuesta. (a) Para detectar y reparar conflictos en las conexiones; (b) Detectar y reparar las rutas asimétricas. (c) Para ser utilizado en otras lógicas donde se requiere un control estricto de las interconexiones en aplicaciones basadas en Xilinx. Plataforma CPA de pruebas personalizadas para el análisis de EM y potencia, incluyendo la construcción de dicha plataforma, el método de medición y análisis de los ataques. Análisis de tiempos para cuantificar los niveles de seguridad. División de Seguridad en la conversión parcial de un sistema de cifrado complejo para reducir los costes de la protección. Prueba de concepto de un sistema de calefacción auto-adaptativo para mitigar los impactos eléctricos debido a la variación del proceso de silicio de manera dinámica. La presente tesis doctoral se encuentra organizada tal y como se detalla a continuación: En el capítulo 1 se abordan los fundamentos de los ataques de canal lateral, que abarca desde conceptos básicos de teoría de modelos de análisis, además de la implementación de la plataforma y la ejecución de los ataques. En el capítulo 2 se incluyen las estrategias de resistencia SCA contra los ataques de potencia diferencial y de EM. Además de ello, en este capítulo se propone una lógica en doble carril compacta y segura como contribución de gran relevancia, así como también se presentará la transformación lógica basada en un diseño a nivel de puerta. Por otra parte, en el Capítulo 3 se abordan los desafíos relacionados con la implementación de lógica en doble carril genérica. Así mismo, se describirá un flujo de diseño personalizado para resolver los problemas de aplicación junto con una herramienta de desarrollo automático de aplicaciones propuesta, para mitigar las barreras de diseño y facilitar los procesos. En el capítulo 4 se describe de forma detallada la elaboración e implementación de las herramientas propuestas. Por otra parte, la verificación y validaciones de seguridad de la lógica propuesta, así como un sofisticado experimento de verificación de la seguridad del rutado, se describen en el capítulo 5. Por último, un resumen de las conclusiones de la tesis y las perspectivas como líneas futuras se incluyen en el capítulo 6. Con el fin de profundizar en el contenido de la tesis doctoral, cada capítulo se describe de forma más detallada a continuación: En el capítulo 1 se introduce plataforma de implementación hardware además las teorías básicas de ataque de canal lateral, y contiene principalmente: (a) La arquitectura genérica y las características de la FPGA a utilizar, en particular la Xilinx Virtex-5; (b) El algoritmo de cifrado seleccionado (un módulo comercial Advanced Encryption Standard (AES)); (c) Los elementos esenciales de los métodos de canal lateral, que permiten revelar las fugas de disipación correlacionadas con los comportamientos internos; y el método para recuperar esta relación entre las fluctuaciones físicas en los rastros de canal lateral y los datos internos procesados; (d) Las configuraciones de las plataformas de pruebas de potencia / EM abarcadas dentro de la presente tesis. El contenido de esta tesis se amplia y profundiza a partir del capítulo 2, en el cual se abordan varios aspectos claves. En primer lugar, el principio de protección de la compensación dinámica de la lógica genérica de precarga de doble carril (Dual-rail Precharge Logic-DPL) se explica mediante la descripción de los elementos compensados a nivel de puerta. En segundo lugar, la lógica PA-DPL es propuesta como aportación original, detallando el protocolo de la lógica y un caso de aplicación. En tercer lugar, dos flujos de diseño personalizados se muestran para realizar la conversión de doble carril. Junto con ello, se aclaran las definiciones técnicas relacionadas con la manipulación por encima de la netlist a nivel de LUT. Finalmente, una breve discusión sobre el proceso global se aborda en la parte final del capítulo. El Capítulo 3 estudia los principales retos durante la implementación de DPLs en FPGAs. El nivel de seguridad de las soluciones de resistencia a SCA encontradas en el estado del arte se ha degenerado debido a las barreras de implantación a través de herramientas EDA convencionales. En el escenario de la arquitectura FPGA estudiada, se discuten los problemas de los formatos de doble carril, impactos parásitos, sesgo tecnológico y la viabilidad de implementación. De acuerdo con estas elaboraciones, se plantean dos problemas: Cómo implementar la lógica propuesta sin penalizar los niveles de seguridad, y cómo manipular un gran número de celdas y automatizar el proceso. El PA-DPL propuesto en el capítulo 2 se valida con una serie de iniciativas, desde características estructurales como doble carril entrelazado o redes de rutado clonadas, hasta los métodos de aplicación tales como las herramientas de personalización y automatización de EDA. Por otra parte, un sistema de calefacción auto-adaptativo es representado y aplicado a una lógica de doble núcleo, con el fin de ajustar alternativamente la temperatura local para equilibrar los impactos negativos de la variación del proceso durante la operación en tiempo real. El capítulo 4 se centra en los detalles de la implementación del kit de herramientas. Desarrollado sobre una API third-party, el kit de herramientas personalizado es capaz de manipular los elementos de la lógica de circuito post P&R ncd (una versión binaria ilegible del xdl) convertido al formato XDL Xilinx. El mecanismo y razón de ser del conjunto de instrumentos propuestos son cuidadosamente descritos, que cubre la detección de enrutamiento y los enfoques para la reparación. El conjunto de herramientas desarrollado tiene como objetivo lograr redes de enrutamiento estrictamente idénticos para la lógica de doble carril, tanto para posicionamiento separado como para el entrelazado. Este capítulo particularmente especifica las bases técnicas para apoyar las implementaciones en los dispositivos de Xilinx y su flexibilidad para ser utilizado sobre otras aplicaciones. El capítulo 5 se enfoca en la aplicación de los casos de estudio para la validación de los grados de seguridad de la lógica propuesta. Se discuten los problemas técnicos detallados durante la ejecución y algunas nuevas técnicas de implementación. (a) Se discute el impacto en el proceso de posicionamiento de la lógica utilizando el kit de herramientas propuesto. Diferentes esquemas de implementación, tomando en cuenta la optimización global en seguridad y coste, se verifican con los experimentos con el fin de encontrar los planes de posicionamiento y reparación optimizados; (b) las validaciones de seguridad se realizan con los métodos de correlación y análisis de tiempo; (c) Una táctica asintótica se aplica a un núcleo AES sobre BCDL estructurado para validar de forma sofisticada el impacto de enrutamiento sobre métricas de seguridad; (d) Los resultados preliminares utilizando el sistema de calefacción auto-adaptativa sobre la variación del proceso son mostrados; (e) Se introduce una aplicación práctica de las herramientas para un diseño de cifrado completa. Capítulo 6 incluye el resumen general del trabajo presentado dentro de esta tesis doctoral. Por último, una breve perspectiva del trabajo futuro se expone, lo que puede ampliar el potencial de utilización de las contribuciones de esta tesis a un alcance más allá de los dominios de la criptografía en FPGAs. ABSTRACT This PhD thesis mainly concentrates on countermeasure techniques related to the Side Channel Attack (SCA), which has been put forward to academic exploitations since 17 years ago. The related research has seen a remarkable growth in the past decades, while the design of solid and efficient protection still curiously remain as an open research topic where more reliable initiatives are required for personal information privacy, enterprise and national data protections. The earliest documented usage of secret code can be traced back to around 1700 B.C., when the hieroglyphs in ancient Egypt are scribed in inscriptions. Information security always gained serious attention from diplomatic or military intelligence transmission. Due to the rapid evolvement of modern communication technique, crypto solution was first incorporated by electronic signal to ensure the confidentiality, integrity, availability, authenticity and non-repudiation of the transmitted contexts over unsecure cable or wireless channels. Restricted to the computation power before computer era, simple encryption tricks were practically sufficient to conceal information. However, algorithmic vulnerabilities can be excavated to restore the encoding rules with affordable efforts. This fact motivated the development of modern cryptography, aiming at guarding information system by complex and advanced algorithms. The appearance of computers has greatly pushed forward the invention of robust cryptographies, which efficiently offers resistance relying on highly strengthened computing capabilities. Likewise, advanced cryptanalysis has greatly driven the computing technologies in turn. Nowadays, the information world has been involved into a crypto world, protecting any fields by pervasive crypto solutions. These approaches are strong because of the optimized mergence between modern mathematical theories and effective hardware practices, being capable of implement crypto theories into various platforms (microprocessor, ASIC, FPGA, etc). Security needs from industries are actually the major driving metrics in electronic design, aiming at promoting the construction of systems with high performance without sacrificing security. Yet a vulnerability in practical implementation found by Prof. Paul Kocher, et al in 1996 implies that modern digital circuits are inherently vulnerable to an unconventional attack approach, which was named as side-channel attack since then from its analysis source. Critical suspicions to theoretically sound modern crypto algorithms surfaced almost immediately after this discovery. To be specifically, digital circuits typically consist of a great number of essential logic elements (as MOS - Metal Oxide Semiconductor), built upon a silicon substrate during the fabrication. Circuit logic is realized relying on the countless switch actions of these cells. This mechanism inevitably results in featured physical emanation that can be properly measured and correlated with internal circuit behaviors. SCAs can be used to reveal the confidential data (e.g. crypto-key), analyze the logic architecture, timing and even inject malicious faults to the circuits that are implemented in hardware system, like FPGA, ASIC, smart Card. Using various comparison solutions between the predicted leakage quantity and the measured leakage, secrets can be reconstructed at much less expense of time and computation. To be precisely, SCA basically encloses a wide range of attack types, typically as the analyses of power consumption or electromagnetic (EM) radiation. Both of them rely on statistical analyses, and hence require a number of samples. The crypto algorithms are not intrinsically fortified with SCA-resistance. Because of the severity, much attention has to be taken into the implementation so as to assemble countermeasures to camouflage the leakages via "side channels". Countermeasures against SCA are evolving along with the development of attack techniques. The physical characteristics requires countermeasures over physical layer, which can be generally classified into intrinsic and extrinsic vectors. Extrinsic countermeasures are executed to confuse the attacker by integrating noise, misalignment to the intra activities. Comparatively, intrinsic countermeasures are built into the algorithm itself, to modify the implementation for minimizing the measurable leakage, or making them not sensitive any more. Hiding and Masking are two typical techniques in this category. Concretely, masking applies to the algorithmic level, to alter the sensitive intermediate values with a mask in reversible ways. Unlike the linear masking, non-linear operations that widely exist in modern cryptographies are difficult to be masked. Approved to be an effective counter solution, hiding method mainly mentions dual-rail logic, which is specially devised for flattening or removing the data-dependent leakage in power or EM signatures. In this thesis, apart from the context describing the attack methodologies, efforts have also been dedicated to logic prototype, to mount extensive security investigations to countermeasures on logic-level. A characteristic of SCA resides on the format of leak sources. Typical side-channel attack concerns the power based analysis, where the fundamental capacitance from MOS transistors and other parasitic capacitances are the essential leak sources. Hence, a robust SCA-resistant logic must eliminate or mitigate the leakages from these micro units, such as basic logic gates, I/O ports and routings. The vendor provided EDA tools manipulate the logic from a higher behavioral-level, rather than the lower gate-level where side-channel leakage is generated. So, the classical implementations barely satisfy these needs and inevitably stunt the prototype. In this case, a customized and flexible design scheme is appealing to be devised. This thesis profiles an innovative logic style to counter SCA, which mainly addresses three major aspects: I. The proposed logic is based on the hiding strategy over gate-level dual-rail style to dynamically overbalance side-channel leakage from lower circuit layer; II. This logic exploits architectural features of modern FPGAs, to minimize the implementation expenses; III. It is supported by a set of assistant custom tools, incorporated by the generic FPGA design flow, to have circuit manipulations in an automatic manner. The automatic design toolkit supports the proposed dual-rail logic, facilitating the practical implementation on Xilinx FPGA families. While the methodologies and the tools are flexible to be expanded to a wide range of applications where rigid and sophisticated gate- or routing- constraints are desired. In this thesis a great effort is done to streamline the implementation workflow of generic dual-rail logic. The feasibility of the proposed solutions is validated by selected and widely used crypto algorithm, for thorough and fair evaluation w.r.t. prior solutions. All the proposals are effectively verified by security experiments. The presented research work attempts to solve the implementation troubles. The essence that will be formalized along this thesis is that a customized execution toolkit for modern FPGA systems is developed to work together with the generic FPGA design flow for creating innovative dual-rail logic. A method in crypto security area is constructed to obtain customization, automation and flexibility in low-level circuit prototype with fine-granularity in intractable routings. Main contributions of the presented work are summarized next: Precharge Absorbed-DPL logic: Using the netlist conversion to reserve free LUT inputs to execute the Precharge and Ex signal in a dual-rail logic style. A row-crossed interleaved placement method with identical routing pairs in dual-rail networks, which helps to increase the resistance against selective EM measurement and mitigate the impacts from process variations. Customized execution and automatic transformation tools for producing identical networks for the proposed dual-rail logic. (a) To detect and repair the conflict nets; (b) To detect and repair the asymmetric nets. (c) To be used in other logics where strict network control is required in Xilinx scenario. Customized correlation analysis testbed for EM and power attacks, including the platform construction, measurement method and attack analysis. A timing analysis based method for quantifying the security grades. A methodology of security partitions of complex crypto systems for reducing the protection cost. A proof-of-concept self-adaptive heating system to mitigate electrical impacts over process variations in dynamic dual-rail compensation manner. The thesis chapters are organized as follows: Chapter 1 discusses the side-channel attack fundamentals, which covers from theoretic basics to analysis models, and further to platform setup and attack execution. Chapter 2 centers to SCA-resistant strategies against generic power and EM attacks. In this chapter, a major contribution, a compact and secure dual-rail logic style, will be originally proposed. The logic transformation based on bottom-layer design will be presented. Chapter 3 is scheduled to elaborate the implementation challenges of generic dual-rail styles. A customized design flow to solve the implementation problems will be described along with a self-developed automatic implementation toolkit, for mitigating the design barriers and facilitating the processes. Chapter 4 will originally elaborate the tool specifics and construction details. The implementation case studies and security validations for the proposed logic style, as well as a sophisticated routing verification experiment, will be described in Chapter 5. Finally, a summary of thesis conclusions and perspectives for future work are included in Chapter 5. To better exhibit the thesis contents, each chapter is further described next: Chapter 1 provides the introduction of hardware implementation testbed and side-channel attack fundamentals, and mainly contains: (a) The FPGA generic architecture and device features, particularly of Virtex-5 FPGA; (b) The selected crypto algorithm - a commercially and extensively used Advanced Encryption Standard (AES) module - is detailed; (c) The essentials of Side-Channel methods are profiled. It reveals the correlated dissipation leakage to the internal behaviors, and the method to recover this relationship between the physical fluctuations in side-channel traces and the intra processed data; (d) The setups of the power/EM testing platforms enclosed inside the thesis work are given. The content of this thesis is expanded and deepened from chapter 2, which is divided into several aspects. First, the protection principle of dynamic compensation of the generic dual-rail precharge logic is explained by describing the compensated gate-level elements. Second, the novel DPL is originally proposed by detailing the logic protocol and an implementation case study. Third, a couple of custom workflows are shown next for realizing the rail conversion. Meanwhile, the technical definitions that are about to be manipulated above LUT-level netlist are clarified. A brief discussion about the batched process is given in the final part. Chapter 3 studies the implementation challenges of DPLs in FPGAs. The security level of state-of-the-art SCA-resistant solutions are decreased due to the implementation barriers using conventional EDA tools. In the studied FPGA scenario, problems are discussed from dual-rail format, parasitic impact, technological bias and implementation feasibility. According to these elaborations, two problems arise: How to implement the proposed logic without crippling the security level; and How to manipulate a large number of cells and automate the transformation. The proposed PA-DPL in chapter 2 is legalized with a series of initiatives, from structures to implementation methods. Furthermore, a self-adaptive heating system is depicted and implemented to a dual-core logic, assumed to alternatively adjust local temperature for balancing the negative impacts from silicon technological biases on real-time. Chapter 4 centers to the toolkit system. Built upon a third-party Application Program Interface (API) library, the customized toolkit is able to manipulate the logic elements from post P&R circuit (an unreadable binary version of the xdl one) converted to Xilinx xdl format. The mechanism and rationale of the proposed toolkit are carefully convoyed, covering the routing detection and repairing approaches. The developed toolkit aims to achieve very strictly identical routing networks for dual-rail logic both for separate and interleaved placement. This chapter particularly specifies the technical essentials to support the implementations in Xilinx devices and the flexibility to be expanded to other applications. Chapter 5 focuses on the implementation of the case studies for validating the security grades of the proposed logic style from the proposed toolkit. Comprehensive implementation techniques are discussed. (a) The placement impacts using the proposed toolkit are discussed. Different execution schemes, considering the global optimization in security and cost, are verified with experiments so as to find the optimized placement and repair schemes; (b) Security validations are realized with correlation, timing methods; (c) A systematic method is applied to a BCDL structured module to validate the routing impact over security metric; (d) The preliminary results using the self-adaptive heating system over process variation is given; (e) A practical implementation of the proposed toolkit to a large design is introduced. Chapter 6 includes the general summary of the complete work presented inside this thesis. Finally, a brief perspective for the future work is drawn which might expand the potential utilization of the thesis contributions to a wider range of implementation domains beyond cryptography on FPGAs.

Recovery of Disruptions in Rapid Transit Networks

This paper studies the disruption management problem of rapid transit rail networks. Besides optimizing the timetable and the rolling stock schedules, we explicitly deal with the effects of the disruption on the passenger demand. We propose a two-step approach that combines an integrated optimization model (for the timetable and rolling stock) with a model for the passengers’ behavior. We report our computational tests on realistic problem instances of the Spanish rail operator RENFE. The proposed approach is able to find solutions with a very good balance between various managerial goals within a few minutes. Se estudia la gestión de las incidencias en redes de metro y cercanías. Se optimizan los horarios y la asignación del material rodante, teniendo en cuenta el comportamiento de los pasajeros. Se reallizan pruebas en varias líneas de la red de cercanías de Madrid, con resultados satisfactorios.

Nonlinear models for lateral dynamics of railway vehicles on bridges subject to wind action

The study of lateral dynamics of running trains on bridges is of importance mainly for the safety of the traffic, and may be relevant for laterally compliant bridges. These studies require threedimensional coupled vehicle-bridge models, wheree consideration of wheel to rail contact is a key aspect. Furthermore, an adequate evaluation of safety of rail traffic requires nonlinear models. A nonlinear coupled model is proposed here for vehicle-structure vertical and lateral dynamics. Vehicles are considered as fully three-dimensional multibody systems including gyroscopic terms and large rotation effects. The bridge structure is modeled by means of finite elements which may be of beam, shell or continuum type and may include geometric or material nonlinearities. The track geometry includes distributed track alignment irregularities. Both subsystems (bridge and vehicles) are described with coordinates in absolute reference frames, as opposed to alternative approaches which describe the multibody system with coordinates relative to the base bridge motion. The wheelrail contact employed is a semi-Hertzian model based on realistic wheel-rail profiles. It allows a detailed geometrical description of the contact patch under each wheel including multiple-point contact, flange contact and uplift. Normal and tangential stresses in each contact are integrated at each time-step to obtain the resultant contact forces. The models have been implemented within an existing finite element analysis software with multibody capabilities, Abaqus (Simulia Ltd., 2010). Further details of the model are presented in Antolín et al. (2012). Representative applications are presented for railway vehicles under lateral wind action on laterally compliant viaducts, showing the relevance of the nonlinear wheel-rail contact model as well as the interaction between bridge and vehicle.

How should the sustainability of the location of dry ports be measured? A proposed methodology using Bayesian networks and multi-criteria decision analysis

The global economic structure, with its decentralized production and the consequent increase in freight traffic all over the world, creates considerable problems and challenges for the freight transport sector. This situation has led shipping to become the most suitable and cheapest way to transport goods. Thus, ports are configured as nodes with critical importance in the logistics supply chain as a link between two transport systems, sea and land. Increase in activity at seaports is producing three undesirable effects: increasing road congestion, lack of open space in port installations and a significant environmental impact on seaports. These adverse effects can be mitigated by moving part of the activity inland. Implementation of dry ports is a possible solution and would also provide an opportunity to strengthen intermodal solutions as part of an integrated and more sustainable transport chain, acting as a link between road and railway networks. In this sense, implementation of dry ports allows the separation of the links of the transport chain, thus facilitating the shortest possible routes for the lowest capacity and most polluting means of transport. Thus, the decision of where to locate a dry port demands a thorough analysis of the whole logistics supply chain, with the objective of transferring the largest volume of goods possible from road to more energy efficient means of transport, like rail or short-sea shipping, that are less harmful to the environment. However, the decision of where to locate a dry port must also ensure the sustainability of the site. Thus, the main goal of this article is to research the variables influencing the sustainability of dry port location and how this sustainability can be evaluated. With this objective, in this paper we present a methodology for assessing the sustainability of locations by the use of Multi-Criteria Decision Analysis (MCDA) and Bayesian Networks (BNs). MCDA is used as a way to establish a scoring, whilst BNs were chosen to eliminate arbitrariness in setting the weightings using a technique that allows us to prioritize each variable according to the relationships established in the set of variables. In order to determine the relationships between all the variables involved in the decision, giving us the importance of each factor and variable, we built a K2 BN algorithm. To obtain the scores of each variable, we used a complete cartography analysed by ArcGIS. Recognising that setting the most appropriate location to place a dry port is a geographical multidisciplinary problem, with significant economic, social and environmental implications, we consider 41 variables (grouped into 17 factors) which respond to this need. As a case of study, the sustainability of all of the 10 existing dry ports in Spain has been evaluated. In this set of logistics platforms, we found that the most important variables for achieving sustainability are those related to environmental protection, so the sustainability of the locations requires a great respect for the natural environment and the urban environment in which they are framed.

Muro cortina modular con marco de baja transmitancia térmica integrado en el vidrio aislante a través de adhesivos estructurales = Unitised curtain wall with low thermal transmittance frame integrated within the insulating glass unit through structural adhesives

Los muros cortina modulares están constituidos por paneles prefabricados que se fijan al edificio a través de anclajes a lo largo del borde del forjado. El proceso de prefabricación garantiza buena calidad y control de los acabados y el proceso de instalación es rápido y no requiere andamiaje. Por estas razones su uso está muy extendido en torres. Sin embargo, el diseño de los marcos de aluminio podría ser más eficiente si se aprovechara la rigidez de los vidrios para reducir la profundidad estructural de los montantes. Asimismo, se podrían reducir los puentes térmicos en las juntas si se sustituyeran los marcos por materiales de menor conductividad térmica que el aluminio. Esta investigación persigue desarrollar un muro cortina alternativo que reduzca la profundidad estructural, reduzca la transmisión térmica en las juntas y permita un acabado enrasado al interior, sin que sobresalgan los montantes. La idea consiste en conectar un marco de material compuesto de fibra de vidrio a lo largo del borde del vidrio aislante a través de adhesivos estructurales para así movilizar una acción estructural compuesta entre los dos vidrios y lograr una baja transmitancia térmica. El marco ha de estar integrado en la profundidad del vidrio aislante. En una primera fase se han efectuado cálculos estructurales y térmicos preliminares para evaluar las prestaciones a un nivel esquemático. Además, se han realizado ensayos a flexión en materiales compuestos de fibra de vidrio y ensayos a cortante en las conexiones adhesivas entre vidrio y material compuesto. Con la información obtenida se ha seleccionado el material del marco y del adhesivo y se han efectuado cambios sobre el diseño original. Los análisis numéricos finales demuestran una reducción de la profundidad estructural de un 80% y una reducción de la transmisión térmica de un 6% en comparación con un sistema convencional tomado como referencia. El sistema propuesto permite obtener acabados enrasados. ABSTRACT Unitised curtain wall systems consist of pre manufactured cladding panels which can be fitted to the building via pre fixed brackets along the edge of the floor slab. They are universally used for high rise buildings because the factory controlled assembly of units ensures high quality and allows fast installation without external access. However, its frame is structurally over-dimensioned because it is designed to carry the full structural load, failing to take advantage of potential composite contribution of glass. Subsequently, it is unnecessarily deep, occupying valuable space, and protrudes to the inside, causing visual disruption. Moreover, it is generally made of high thermal conductivity metal alloys, contributing to substantial thermal transmission at joints. This research aims to develop a novel frame-integrated unitised curtain wall system that will reduce thermal transmission at joints, reduce structural depth significantly and allow an inside flush finish. The idea is to adhesively bond a Fibre Reinforced Polymer (FRP) frame to the edge of the Insulated Glass Unit (IGU), thereby achieving composite structural behaviour and low thermal transmittance. The frame is to fit within the glazing cavity depth. Preliminary analytical structural and numerical thermal calculations are carried out to assess the performance of an initial schematic design. 4-point bending tests on GFRP and single-lap shear tests on bonded connections between GFRP and glass are performed to inform the frame and adhesive material selection process and to characterise these materials. Based on the preliminary calculations and experimental tests, some changes are put into effect to improve the performance of the system and mitigate potential issues. Structural and thermal numerical analysis carried out on the final detail design confirm a reduction of the structural depth to almost one fifth and a reduction of thermal transmission of 6% compared to a benchmark conventional system. A flush glazed appearance both to the inside and the outside are provided while keeping the full functionality of a unitised system.