Semantic neology in the domain of videogames in Spanish

The aim of this paper is to discuss the meaning of five neologisms in the domain of videogames in Spanish: título, aventura, personaje, plataforma, and rol. Our study focuses on a special type of neologism since the Spanish terms we deal with here are not strictly new words; they are what have been called sense neologisms or neosemanticisms, that is, old words taking a new sense in a different domain. These words were identified as new concepts after a process of analysis based on contextual evidence. This study of neology is based on the analysis of a corpus of press articles evaluating videogames published by the Spanish newspaper El País from 1998 to 2008. The analysis of the instances of use of domain specific terms in the corpus revealed that they acquired new senses different to those they have in other domains where they are also used. The paper explains the process of discovering the specialized meaning these words have developed in the domain of videogames and how the analysis of collocational behavior helps in the process of discovering the new sense and in the design of the definition provided.

Semantic Neology in the Domain of Videogames in Spanish.

The aim of this paper is to discuss the meaning of five neologisms in the domain of videogames in Spanish: título, aventura, personaje, plataforma, and rol. Our study focuses on a special type of neologism since the Spanish terms we deal with here are not strictly new words; they are what have been called sense neologisms or neosemanticisms, that is, old words taking a new sense in a different domain. These words were identified as new concepts after a process of analysis based on contextual evidence. This study of neology is based on the analysis of a corpus of press articles evaluating videogames published by the Spanish newspaper El País from 1998 to 2008. The analysis of the instances of use of domain specific terms in the corpus revealed that they acquired new senses different to those they have in other domains where they are also used. The paper explains the process of discovering the specialized meaning these words have developed in the domain of videogames and how the analysis of collocational behavior helps in the process of discovering the new sense and in the design of the definition provided. RESUMEN: En este trabajo se presentan cinco neologismos del ámbito del videojuego en español: “título”, “aventura”, “personaje”, “plataforma” y “rol”. Se trata de un tipo especial de neologismo, conocido también como “neologismo semántico” o “neosemanticismo”, ya que son palabras ya existentes en la lengua que adquieren un nuevo significado. Los nuevos significados que adquieren estos términos en el ámbito del videojuego se establecieron tras el análisis del contexto de uso en un corpus periodístico de críticas de videojuegos. Este corpus recoge las críticas de videojuegos publicadas por el periódico El País entre 1998 y 2008. El análisis de los casos de uso de los términos en el corpus de videojuegos reveló que adquirían un nuevo significado diferente al de su uso en otros ámbitos o en el lenguaje general. El artículo describe cada uno de los neologismos y el proceso de análisis contextual que conduce a descubrir el nuevo significado y elaborar su definición.

Desarrollo de un sistema automático de medida para el control del consumo en sistemas empotrados

El Grupo de Diseño Electrónico y Microelectrónico de la Universidad Politécnica de Madrid -GDEM- se dedica, entre otras cosas, al estudio y mejora del consumo en sistemas empotrados. Es en este lugar y sobre este tema donde el proyecto a exponer ha tomado forma y desarrollo. Según un artículo de la revista online Revista de Electrónica Embebida, un sistema empotrado o embebido es aquel “sistema controlado por un microprocesador y que gracias a la programación que incorpora o que se le debe incorporar, realiza una función específica para la que ha sido diseñado, integrando en su interior la mayoría de los elementos necesarios para realizar dicho función”. El porqué de estudiar sobre este tema responde a que, cada vez, hay mayor presencia de sistemas empotrados en nuestra vida cotidiana. Esto es debido a que se está tendiendo a dotar de “inteligencia” a todo lo que puedan hacer nuestra vida un poco más fácil. Nos podemos encontrar dichos sistemas en fábricas, oficinas de atención a los ciudadanos, sistemas de seguridad de hogar, relojes, móviles, lavadoras, hornos, aspiradores y un largo etcétera en cualquier aparato que nos podamos imaginar. A pesar de sus grandes ventajas, aún hay grandes inconvenientes. El mayor problema que supone a día de hoy es la autonomía del mismo sistema, ya que hablamos de aparatos que muchas veces están alimentados por baterías -para ayudar a su portabilidad–. Por esto, se está intentando dotar a dichos sistemas de una capacidad de ahorro de energía y toma de decisiones que podrían ayudar a duplicar la autonomía de dicha batería. Un ejemplo claro son los Smartphones de hoy en día, unos aparatos casi indispensables que pueden tener una autonomía de un día. Esto es poco práctico para el usuario en caso de viajes, trabajo u otras situaciones en las que se le dé mucho uso y no pueda tener acceso a una red eléctrica. Es por esto que surge la necesidad de investigar, sin necesidad de mejorar el hardware del sistema, una manera de mejorar esta situación. Este proyecto trabajará en esa línea creando un sistema automático de medida el cual generará las corrientes que servirán como entrada para verificar el sistema de adquisición que junto con la tarjeta Beagle Board permitirá la toma de decisiones en relación con el consumo de energía. Para realizar este sistema, nos ayudaremos de diferentes herramientas que podremos encontrar en el laboratorio del GDEM, como la fuente de alimentación Agilent y la Beagle Board –como principales herramientas de trabajo- . El objetivo principal será la simulación de unas señales que, después de pasar un proceso de conversión y tratado, harán la función de representación del consumo de cada una de las partes que pueden formar un sistema empotrado genérico. Por lo tanto, podemos decir que el sistema hará la funcionalidad de un banco de pruebas que ayudará a simular dicho consumo para que el microprocesador del sistema pueda llegar a tomar alguna decisión. ABSTRACT. The Electronic and Microelectronic Design Group of Universidad Politécnica de Madrid -GDEM- is in charge, between other issues, of improving the embedded system’s consumption. It is in this place and about this subject where the exposed project has taken shape and development. According to an article from de online magazine Revista de Electronica Embebida, an embedded system is “the one controlled by a microprocessor and, thanks to the programing that it includes, it carries out a specific function what it has been designed for, being integrated in it the most necessary elements for realizing the already said function”. The because of studying this subject, answers that each time there is more presence of the embedded system in our daily life. This is due to the tendency of providing “intelligence” to all what can make our lives easier. We can find this kind of systems in factories, offices, security systems, watchers, mobile phones, washing machines, ovens, hoovers and, definitely, in all kind of machines what we can think of. Despite its large vantages, there are still some inconveniences. Nowadays, the most important problem is the autonomy of the system itself when machines that have to be supplied by batteries –making easier the portability-. Therefore, this project is going after a save capacity of energy for the system as well as being able to take decisions in order to duplicate batteries’ autonomy. Smartphones are a clear example. They are a very successful product but the autonomy is just one day. This is not practical for users, at all, if they have to travel, to work or to do any activity that involves a huge use of the phone without a socket nearby. That is why the need of investigating a way to improve this situation. This project is working on this line, creating an automatic system that will generate the currents for verifying the acquisition system that, with the beagle board, will help taking decisions regarding the energy’s consumption. To carry out this system, we need different tools that we can find in the laboratory of the group previously mentioned, like power supply Agilent and the Beagle Board – as main working tools –. The main goal is the simulation of some signals that, after a conversion process, will represent de consumption of each of the parts in the embedded generic system. Therefore, the system will be a testing ground that simulate the consumption, once sent to the processor, to be processed and so the microprocessor system might take some decision.

State Convergence Theory Applied to a Delayed Teleoperation System

State convergence is a control strategy that was proposed in the early 2000s to ensure stability and transparency in a teleoperation system under specific control gains values. This control strategy has been implemented for a linear system with or without time delay. This paper represents the first attempt at demonstrating, theoretically and experimentantally, that this control strategy can also be applied to a nonlinear teleoperation system with n degrees of freedom and delay in the communication channel. It is assumed that the human operator applies a constant force on the local manipulator during the teleoperation. In addition, the interaction between the remote manipulator and the environment is considered passive. Communication between the local and remote sites is made by means of a communication channel with variable time delay. In this article the theory of Lyapunov-Krasovskii was used to demonstrate that the local-remote teleoperation system is asymptotically stable.

Constructed Fashion: The Catwalk System as an Architectural Project

Teniendo en cuenta que no hay nada que se escape de la moda 1, y extendiendonos más allá de esta manida discusión sobre intersecciones formales, esta investigación propone la pasarela como un lugar real de mediación entre moda y arquitectura. Asumiendo esta condición, la pasarela encarna nuevos modos de producción apropiándose de su espacio y estructura, y convierténdose en una máquina capaz de generar múltiples y más bien infinitos significados. La moda es sin duda un proyecto creativo, que ha venido utilizando la pasarela como un marco para la reordenación de su narrativa visual, renovándose asi mismo como fenómeno social. Este proyecto de investigación plantea, que contrariamente las tipologías actuales de las pasarelas no nos facilitan la comprensión de una colección – que suele ser el objetivo principal. Presentan en cambio un entorno en el que se acoplan diferentes formatos visuales, -con varias capas-, conviéndolo en una compleja construcción y provocando nunerosas fricciones con el espacio-tiempo-acción durante el proceso de creación de otros territorios. Partiendo de la idea de la pasarela como un sistema, en el que sus numerosas variables pueden producir diversas combinaciones, esta investigación plantea la hipótesis por la cual un nuevo sistema de pasarela se estaría formando enteramente con capas de información. Este escenario nos conduciría a la inmersión final de la moda en los tejidos de la virtualidad. Si bien el debate sobre la relevancia de los desfiles de moda se ha vuelto más evidente hoy en día, esta investigación especula con la posibilidad del pensamiento arquitectónico y como este puede introducir metodologías de análisis en el marco de estos desfiles de moda, proponiendo una lectura de la pasarela como un sistema de procedimientos específicos inherente a los proyectos/procesos de la arquitectura. Este enfoque enlaza ambas prácticas en un territorio común donde el espacio, el diseño, el comportamiento, el movimiento, y los cuerpos son ordenados/organizados en la creación de estas nuevas posibilidades visuales, y donde las interacciones activan la generación de la novedad y los mensajes. PALABRAS CLAVES moda, sistema, virtual, información, arquitectura Considering that there is nothing left untouched by fashion2, and going beyond the already exhausted discussion about formal intersections, this research introduces the catwalk as the real arena of mediation between fashion and architecture. By assuming this condition, the catwalk embodies new modes of production that appropriates its space and turns it into a machine for generating multiple if not infinite meanings. Fashion, as a creative project, has utilized the catwalk as a frame for rearranging its visual narrative and renewing itself as social phenomena. This research disputes, however, that the current typologies of catwalks do not facilitate the understanding of the collection – as its primary goal - but, instead, present an environment composed of multi-layered visual formats, becoming a complex construct that collides space-time-action in the creation of other territories. Departing from the analysis of the catwalk as a system and how its many variables can produce diverse combinations, this research presents the hypothesis that a new system is being formed entirely built out of information. Such scenario indicates fashion´s final immersion into the fabrics of virtuality. While the discussion about the relevance of fashion shows has become more evident today, this research serves as an introductory speculation on how architectural thinking can introduce methodologies of analysis within the framework of the fashion shows, by proposing a reading of the catwalk as a system through specific procedures that are inherent to architectural projects. Such approach intertwines both practices into a common territory where space, design, behaviour, movement, and bodies are organized for the creation of visual possibilities, and where interactions are triggered in the making of novelty and messages. KEYWORDS fashion, system, virtual, information, architectural

FATS: a framework for annotation of travel blogs based on subjectivity

This paper describes a framework for annotation on travel blogs based on subjectivity (FATS). The framework has the capability to auto-annotate -sentence by sentence- sections from blogs (posts) about travelling in the Spanish language. FATS is used in this experiment to annotate com- ponents from travel blogs in order to create a corpus of 300 annotated posts. Each subjective element in a sentence is annotated as positive or negative as appropriate. Currently correct annotations add up to about 95 per cent in our subset of the travel domain. By means of an iterative process of annotation we can create a subjectively annotated domain specific corpus.

Herramienta Web para el modelado de consultas CEP (Complex Event Processing)

RESUMEN En los últimos años, debido al incremento en la demanda por parte de las empresas de tecnologías que posibiliten la monitorización y el análisis de un gran volumen de datos en tiempo real, la tecnología CEP (Complex Event Processing) ha surgido como una potencia en alza y su uso se ha incrementado notablemente en ciertos sectores como, por ejemplo, la gestión y automatización de procesos de negocios, finanzas, monitorización de redes y aplicaciones, así como redes de sensores inteligentes como el caso de estudio en el que nos centraremos. CEP se basa en un lenguaje de procesamiento de eventos (Event Processing Language,EPL) cuya utilización puede resultar bastante compleja para usuarios inexpertos. Esta complejidad supone un hándicap y, por lo tanto, un problema a la hora de que su uso se extienda. Este Proyecto Fin de Grado (PFG) pretende dar una solución a este problema, acercando al usuario la tecnología CEP mediante técnicas de abstracción y modelado. Para ello, este PFG ha definido un lenguaje de modelado específico dominio, sencillo e intuitivo para el usuario inexperto, al que se ha dado soporte mediante el desarrollo de una herramienta de modelado gráfico (CEP Modeler) en la que se pueden modelar consultas CEP de forma gráfica, sencilla y de manera más accesible para el usuario. ABSTRACT Over recent years, more and more companies demand technology for monitoring and analyzing a vast volume of data in real time. In this regard, the CEP technology (Complex Event Processing) has emerged as a novel approach to that end, and its use has increased dramatically in certain domains, such as, management and automation of business processes, finance, monitoring of networks and applications, as well as smart sensor networks as the case study in which we will focus. CEP is based on in the Event Processing Language (EPL). This language can be rather difficult to use for new users. This complexity can be a handicap, and therefore, a problem at the time of extending its use. This project aims to provide a solution to this problem, trying to approach the CEP technology to users through abstraction and modelling techniques. To that end, this project has defined an intuitive and simple domain-specific modelling language for new users through a web tool (CEP Modeler) for graphically modeling CEP queries, in an easier and more accessible way.

Generación automática de la configuración de subestaciones eléctricas según el Estándar IEC 61850 a partir de una herramienta de diseño gráfico

La evolución de las redes eléctricas se dirige hacia lo que se conoce como “Smart Grids” o “Redes Eléctricas Inteligentes”. Estas “Smart Grids” se componen de subestaciones eléctricas, que a su vez se componen de unos dispositivos llamados IEDs (Dispositivos Electrónicos Inteligentes – Intelligent Electronic Devices). El diseño de IEDs se encuentra definido en la norma IEC 61850, que especifica además un Lenguaje de Configuración de Subestaciones (Substation Configuration Language SCL) para la definición de la configuración de subestaciones y sus IEDs. Hoy en día, este estándar internacional no sólo se utiliza para diseñar correctamente IEDs y asegurar su interoperabilidad, sino que también se utiliza para el diseño de otros dispositivos de la red eléctrica, como por ejemplo, medidores inteligentes. Sin embargo, aunque existe una tendencia cada vez mayor del uso de este estándar, la comprensión y el manejo del mismo resulta difícil debido al gran volumen de información que lo compone y del nivel de detalle que utiliza, por lo que su uso para el diseño de IEDs se hace tedioso sin la ayuda de un soporte software. Es por ello que, para facilitar la aplicación del estándar IEC 61850 en el diseño de IEDs se han desarrollado herramientas como “Visual SCL”, “SCL Explorer” o “61850 SCLVisual Design Tool”. En concreto, “61850 SCLVisual Design Tool” es una herramienta gráfica para el modelado de subestaciones electricas, generada mediante el uso de los frameworks Eclipse Modeling Framework (EMF) y Epsilon Generative Modeling Technologies (GMT) y desarrollada por el grupo de investigación SYST de la UPM. El objetivo de este proyecto es añadir una nueva funcionalidad a la herramienta “61850 Visual SCL DesignTool”. Esta nueva funcionalidad consiste en la generación automática de un fichero de configuración de subestaciones eléctricas según el estándar IEC 61850 a partir de de una herramienta de diseño gráfico. Este fichero, se denomina SCD (Substation Configuration Description), y se trata de un fichero XML conforme a un esquema XSD (XML Schema Definition) mediante el que se define el lenguaje de configuración de subestaciones SCL del IEC 61850. Para el desarrollo de este proyecto, es necesario el estudio del lenguaje para la configuración de subestaciones SCL, así como del lenguaje gráfico específico de dominio definido por la herramienta “61850 SCLVisual Design Tool”, la estructura de los ficheros SCD, y finalmente, del lenguaje EGL (Epsilon Generation Language) para la transformación y generación automática de código a partir de modelos EMF. ABSTRACT Electrical networks are evolving to “Smart Grids”. Smart Grids are composed of electrical substations that in turn are composed of devices called IEDs (Intelligent Electronic Devices). The design of IEDs is defined by the IEC 61850 standard, which also specifies a Substation Configuration Languaje (SCL) used to define the configuration of substations and their IEDs. Nowadays, this international standard is not only used to design properly IEDs and guarantee their interoperability, but it is also used to design different electrical network devices, such as, smart meters. However, although the use of this standard is growing, its compression as well as its management, is still difficult due to its large volume of information and its level of detail. As a result, designing IEDs becomes a tedious task without a software support. As a consequence of this, in order to make easier the application of the IEC 61850 standard while designing IEDs, some software tools have been developed, such as: “Visual SCL”, “SCL Explorer” or “61850 SCLVisual Design Tool”. In particular, “61850 SCLVisual Design Tool” is a graphical tool used to make electrical substations models, and developed with the Eclipse Modeling Framework (EMF) and Epsilon Generative Modeling Technologies (GMT) by the research group SYST of the UPM. The aim of this project is to add a new functionality to “61850 Visual SCL DesignTool”. This new functionality consists of the automatic code generation of a substation configuration file according to the IEC 61850 standard. This file is called SCD (Substation Configuration Description), and it is a XML file that follows a XSD (XML Schema Definition) that defines the Substation Configuration Language (SCL) of the IEC 61850. In order to develop this project, it is necessary to study the Substation Configuration Language (SCL), the domain-specific graphical languaje defined by the tool “61850 SCLVisual Design Tool”, the structure of a SCD file, and the Epsilon Generation Language (EGL) used for the automatic code generation from EMF models

Integración MPlayer-OpenSVC en el procesador multinúcleo OMAP3530

La constante evolución de dispositivos portátiles multimedia que se ha producido en la última década ha provocado que hoy en día se disponga de una amplia variedad de dispositivos con capacidad para reproducir contenidos multimedia. En consecuencia, la reproducción de esos contenidos en dichos terminales lleva asociada disponer de procesadores que soporten una alta carga computacional, ya que las tareas de descodificación y presentación de video así lo requieren. Sin embargo, un procesador potente trabajando a elevadas frecuencias provoca un elevado consumo de la batería, y dado que se pretende trabajar con dispositivos portátiles, la vida útil de la batería se convierte en un asunto de especial importancia. La problemática que se plantea se ha convertido en una de las principales líneas de investigación del Grupo de Investigación GDEM (Grupo de Diseño Electrónico y Microelectrónico). En esta línea de trabajo, se persigue cómo optimizar el consumo de energía en terminales portables desde el punto de vista de la reducción de la calidad de experiencia del usuario a cambio de una mayor autonomía del terminal. Por tanto, para lograr esa reducción de la calidad de experiencia mencionada, se requiere un estándar de codificación de vídeo que así lo permita. El Grupo de Investigación GDEM cuenta con experiencia en el estándar de vídeo escalable H.264/SVC, el cual permite degradar la calidad de experiencia en función de las necesidades/características del dispositivo. Más concretamente, un video escalable contiene embebidas distintas versiones del video original que pueden ser descodificadas en diferentes resoluciones, tasas de cuadro y calidades (escalabilidades espacial, temporal y de calidad respectivamente), permitiendo una adaptación rápida y muy flexible. Seleccionado el estándar H.264/SVC para las tareas de vídeo, se propone trabajar con Mplayer, un reproductor de vídeos de código abierto (open source), al cual se le ha integrado un descodificador para vídeo escalable denominado OpenSVC. Por último, como dispositivo portable se trabajará con la plataforma de desarrollo BeagleBoard, un sistema embebido basado en el procesador OMAP3530 que permite modificar la frecuencia de reloj y la tensión de alimentación dinámicamente reduciendo de este modo el consumo del terminal. Este procesador a su vez contiene integrados un procesador de propósito general (ARM Cortex-A8) y un procesador digital de señal (DSP TMS320C64+TM). Debido a la alta carga computacional de la descodificación de vídeos escalables y la escasa optimización del ARM para procesamiento de datos, se propone llevar a cabo la ejecución de Mplayer en el ARM y encargar la tarea de descodificación al DSP, con la finalidad de reducir el consumo y por tanto aumentar la vida útil del sistema embebido sobre el cual se ejecutará la aplicación desarrollada. Una vez realizada esa integración, se llevará a cabo una caracterización del descodificador alojado en el DSP a través de una serie de medidas de rendimiento y se compararán los resultados con los obtenidos en el proceso de descodificación realizado únicamente en el ARM. ABSTRACT During the last years, the multimedia portable terminals have gradually evolved causing that nowadays a several range of devices with the ability of playing multimedia contents are easily available for everyone. Consequently, those multimedia terminals must have high-performance processors to play those contents because the coding and decoding tasks demand high computational load. However, a powerful processor performing to high frequencies implies higher battery consumption, and this issue has become one of the most important problems in the development cycle of a portable terminal. The power/energy consumption optimization on multimedia terminals has become in one the most significant work lines in the Electronic and Microelectronic Research Group of the Universidad Politécnica de Madrid. In particular, the group is researching how to reduce the user‟s Quality of Experience (QoE) quality in exchange for increased battery life. In order to reduce the Quality of Experience (QoE), a standard video coding that allows this operation is required. The H.264/SVC allows reducing the QoE according to the needs/characteristics of the terminal. Specifically, a scalable video contains different versions of original video embedded in an only one video stream, and each one of them can be decoded in different resolutions, frame rates and qualities (spatial, temporal and quality scalabilities respectively). Once the standard video coding is selected, a multimedia player with support for scalable video is needed. Mplayer has been proposed as a multimedia player, whose characteristics (open-source, enormous flexibility and scalable video decoder called OpenSVC) are the most suitable for the aims of this Master Thesis. Lastly, the embedded system BeagleBoard, based on the multi-core processor OMAP3530, will be the development platform used in this project. The multimedia terminal architecture is based on a commercial chip having a General Purpose Processor (GPP – ARM Cortex A8) and a Digital Signal Processor (DSP, TMS320C64+™). Moreover, the processor OMAP3530 has the ability to modify the operating frequency and the supply voltage in a dynamic way in order to reduce the power consumption of the embedded system. So, the main goal of this Master Thesis is the integration of the multimedia player, MPlayer, executed at the GPP, and scalable video decoder, OpenSVC, executed at the DSP in order to distribute the computational load associated with the scalable video decoding task and to reduce the power consumption of the terminal. Once the integration is accomplished, the performance of the OpenSVC decoder executed at the DSP will be measured using different combinations of scalability values. The obtained results will be compared with the scalable video decoding performed at the GPP in order to show the low optimization of this kind of architecture for decoding tasks in contrast to DSP architecture.

Exploration of RVC applications using an ARM multicore processor = Exploración de aplicaciones RVC empleando un procesador ARM multinúcleo

Single core capabilities have reached their maximum clock speed; new multicore architectures provide an alternative way to tackle this issue instead. The design of decoding applications running on top of these multicore platforms and their optimization to exploit all system computational power is crucial to obtain best results. Since the development at the integration level of printed circuit boards are increasingly difficult to optimize due to physical constraints and the inherent increase in power consumption, development of multiprocessor architectures is becoming the new Holy Grail. In this sense, it is crucial to develop applications that can run on the new multi-core architectures and find out distributions to maximize the potential use of the system. Today most of commercial electronic devices, available in the market, are composed of embedded systems. These devices incorporate recently multi-core processors. Task management onto multiple core/processors is not a trivial issue, and a good task/actor scheduling can yield to significant improvements in terms of efficiency gains and also processor power consumption. Scheduling of data flows between the actors that implement the applications aims to harness multi-core architectures to more types of applications, with an explicit expression of parallelism into the application. On the other hand, the recent development of the MPEG Reconfigurable Video Coding (RVC) standard allows the reconfiguration of the video decoders. RVC is a flexible standard compatible with MPEG developed codecs, making it the ideal tool to integrate into the new multimedia terminals to decode video sequences. With the new versions of the Open RVC-CAL Compiler (Orcc), a static mapping of the actors that implement the functionality of the application can be done once the application executable has been generated. This static mapping must be done for each of the different cores available on the working platform. It has been chosen an embedded system with a processor with two ARMv7 cores. This platform allows us to obtain the desired tests, get as much improvement results from the execution on a single core, and contrast both with a PC-based multiprocessor system. Las posibilidades ofrecidas por el aumento de la velocidad de la frecuencia de reloj de sistemas de un solo procesador están siendo agotadas. Las nuevas arquitecturas multiprocesador proporcionan una vía de desarrollo alternativa en este sentido. El diseño y optimización de aplicaciones de descodificación de video que se ejecuten sobre las nuevas arquitecturas permiten un mejor aprovechamiento y favorecen la obtención de mayores rendimientos. Hoy en día muchos de los dispositivos comerciales que se están lanzando al mercado están integrados por sistemas embebidos, que recientemente están basados en arquitecturas multinúcleo. El manejo de las tareas de ejecución sobre este tipo de arquitecturas no es una tarea trivial, y una buena planificación de los actores que implementan las funcionalidades puede proporcionar importantes mejoras en términos de eficiencia en el uso de la capacidad de los procesadores y, por ende, del consumo de energía. Por otro lado, el reciente desarrollo del estándar de Codificación de Video Reconfigurable (RVC), permite la reconfiguración de los descodificadores de video. RVC es un estándar flexible y compatible con anteriores codecs desarrollados por MPEG. Esto hace de RVC el estándar ideal para ser incorporado en los nuevos terminales multimedia que se están comercializando. Con el desarrollo de las nuevas versiones del compilador específico para el desarrollo de lenguaje RVC-CAL (Orcc), en el que se basa MPEG RVC, el mapeo estático, para entornos basados en multiprocesador, de los actores que integran un descodificador es posible. Se ha elegido un sistema embebido con un procesador con dos núcleos ARMv7. Esta plataforma nos permitirá llevar a cabo las pruebas de verificación y contraste de los conceptos estudiados en este trabajo, en el sentido del desarrollo de descodificadores de video basados en MPEG RVC y del estudio de la planificación y mapeo estático de los mismos.

Combined determination of sharing and freeness of program variables through abstract interpretation

In this paper, abstract interpretation algorithms are described for computing the sharmg as well as the freeness information about the run-time instantiations of program variables. An abstract domain is proposed which accurately and concisely represents combined freeness and sharing information for program variables. Abstract unification and all other domain-specific functions for an abstract interpreter working on this domain are presented. These functions are illustrated with an example. The importance of inferring freeness is stressed by showing (1) the central role it plays in non-strict goal independence, and (2) the improved accuracy it brings to the analysis of sharing information when both are computed together. Conversely, it is shown that keeping accurate track of sharing allows more precise inference of freeness, thus resulting in an overall much more powerful abstract interpreter.

A core ontological model for semantic sensor web infrastructures

Semantic Sensor Web infrastructures use ontology-based models to represent the data that they manage; however, up to now, these ontological models do not allow representing all the characteristics of distributed, heterogeneous, and web-accessible sensor data. This paper describes a core ontological model for Semantic Sensor Web infrastructures that covers these characteristics and that has been built with a focus on reusability. This ontological model is composed of different modules that deal, on the one hand, with infrastructure data and, on the other hand, with data from a specific domain, that is, the coastal flood emergency planning domain. The paper also presents a set of guidelines, followed during the ontological model development, to satisfy a common set of requirements related to modelling domain-specific features of interest and properties. In addition, the paper includes the results obtained after an exhaustive evaluation of the developed ontologies along different aspects (i.e., vocabulary, syntax, structure, semantics, representation, and context).

Virtual Excursions: a new way to explore science in class

The educational platform Virtual Science Hub (ViSH) has been developed as part of the GLOBAL excursion European project. ViSH (http://vishub.org/) is a portal where teachers and scientist interact to create virtual excursions to science infrastructures. The main motivation behind the project was to connect teachers - and in consequence their students - to scientific institutions and their wide amount of infrastructures and resources they are working with. Thus the idea of a hub was born that would allow the two worlds of scientists and teachers to connect and to innovate science teaching. The core of the ViSH?s concept design is based on virtual excursions, which allow for a number of pedagogical models to be applied. According to our internal definition a virtual excursion is a tour through some digital context by teachers and pupils on a given topic that is attractive and has an educational purpose. Inquiry-based learning, project-based and problem-based learning are the most prominent approaches that a virtual excursion may serve. The domain specific resources and scientific infrastructures currently available on the ViSH are focusing on life sciences, nano-technology, biotechnology, grid and volunteer computing. The virtual excursion approach allows an easy combination of these resources into interdisciplinary teaching scenarios. In addition, social networking features support the users in collaborating and communicating in relation to these excursions and thus create a community of interest for innovative science teaching. The design and development phases were performed following a participatory design approach. An important aspect in this process was to create design partnerships amongst all actors involved, researchers, developers, infrastructure providers, teachers, social scientists, and pedagogical experts early in the project. A joint sense of ownership was created and important changes during the conceptual phase were implemented in the ViSH due to early user feedback. Technology-wise the ViSH is based on the latest web technologies in order to make it cross-platform compatible so that it works on several operative systems such as Windows, Mac or Linux and multi-device accessible, such as desktop, tablet and mobile devices. The platform has been developed in HTML5, the latest standard for web development, assuring that it can run on any modern browser. In addition to social networking features a core element on the ViSH is the virtual excursions editor. It is a web tool that allows teachers and scientists to create rich mash-ups of learning resources provided by the e-Infrastructures (i.e. remote laboratories and live webcams). These rich mash-ups can be presented in either slides or flashcards format. Taking advantage of the web architecture supported, additional powerful components have been integrated like a recommendation engine to provide personalized suggestions about educational content or interesting users and a videoconference tool to enhance real-time collaboration like MashMeTV (http://www.mashme.tv/).

The Threads of Biosystems Engineering

The core concepts, or threads, of Biosystems Engineering (BSEN) are variously understood by those within the discipline, but have never been unequivocally defined due to its early stage of development. This makes communication and teaching difficult compared to other well established engineering subjects. Biosystems Engineering is a field of Engineering which int egrates engineering science and design with applied biological, environmental and agricultural sciences. It represents an evolution of the Agricultural Engineering discipline applied to all living organisms not including biomedical applications. The basic key element for the emerging EU Biosystems Engineering program of studies is to ensure that it offers essential minimum fundamental engine ering knowledge and competences . A core curriculum developed by Erasmus Thematic Networks is used as benchmark for Agr icultural and Biosystems Engineering studies in Europe. The common basis of the core curriculum for the discipline across the Atlantic , including a minimum of competences comprising the Biosystems Engineering core competencies, has been defined by an Atlan tis project , but this needs to be taken further by defining the threads linking courses together. This paper presents a structured approach to define the Threads of BSEN . The definition of the mid-level competences and the associated learning outcomes has been one of the objectives of the Atlantis programme TABE.NET. The mid-level competences and learning outcomes for each of six specializations of BSEN are defined while the domain-specific knowledge to be acquired for each outcome is proposed. Once the proposed definitions are adopted, these threads will be available for global development of the BSEN.

Knowledge-based spatiotemporal linear abstraction

We present a theoretical framework and a case study for reusing the same conceptual and computational methodology for both temporal abstraction and linear (unidimensional) space abstraction, in a domain (evaluation of traffic-control actions) significantly different from the one (clinical medicine) in which the method was originally used. The method, known as knowledge-based temporal abstraction, abstracts high-level concepts and patterns from time-stamped raw data using a formal theory of domain-specific temporal-abstraction knowledge. We applied this method, originally used to interpret time-oriented clinical data, to the domain of traffic control, in which the monitoring task requires linear pattern matching along both space and time. First, we reused the method for creation of unidimensional spatial abstractions over highways, given sensor measurements along each highway measured at the same time point. Second, we reused the method to create temporal abstractions of the traffic behavior, for the same space segments, but during consecutive time points. We defined the corresponding temporal-abstraction and spatial-abstraction domain-specific knowledge. Our results suggest that (1) the knowledge-based temporal-abstraction method is reusable over time and unidimensional space as well as over significantly different domains; (2) the method can be generalized into a knowledge-based linear-abstraction method, which solves tasks requiring abstraction of data along any linear distance measure; and (3) a spatiotemporal-abstraction method can be assembled from two copies of the generalized method and a spatial-decomposition mechanism, and is applicable to tasks requiring abstraction of time-oriented data into meaningful spatiotemporal patterns over a linear, decomposable space, such as traffic over a set of highways.