Model-Driven Methodology for Rapid Deployment of Smart Spaces based on Resource-Oriented Architectures

Advances in electronics nowadays facilitate the design of smart spaces based on physical mash-ups of sensor and actuator devices. At the same time, software paradigms such as Internet of Things (IoT) and Web of Things (WoT) are motivating the creation of technology to support the development and deployment of web-enabled embedded sensor and actuator devices with two major objectives: (i) to integrate sensing and actuating functionalities into everyday objects, and (ii) to easily allow a diversity of devices to plug into the Internet. Currently, developers who are applying this Internet-oriented approach need to have solid understanding about specific platforms and web technologies. In order to alleviate this development process, this research proposes a Resource-Oriented and Ontology-Driven Development (ROOD) methodology based on the Model Driven Architecture (MDA). This methodology aims at enabling the development of smart spaces through a set of modeling tools and semantic technologies that support the definition of the smart space and the automatic generation of code at hardware level. ROOD feasibility is demonstrated by building an adaptive health monitoring service for a Smart Gym.

Calibration proposal for new antenna array architectures and technologies for space communications

In large antenna arrays with a large number of antenna elements, the required number of measurements for the characterization of the antenna array is very demanding in cost and time. This letter presents a new offline calibration process for active antenna arrays that reduces the number of measurements by subarray-level characterization. This letter embraces measurements, characterization, and calibration as a global procedure assessing about the most adequate calibration technique and computing of compensation matrices. The procedure has been fully validated with measurements of a 45-element triangular panel array designed for Low Earth Orbit (LEO) satellite tracking that compensates the degradation due to gain and phase imbalances and mutual coupling.

An Interleaved EPE-Immune PA-DPL Structure for Resisting Concentrated EM Side Channel Attacks on FPGA Implementation

Early propagation effect (EPE) is a critical problem in conventional dual-rail logic implementations against Side Channel Attacks (SCAs). Among previous EPE-resistant architectures, PA-DPL logic offers EPE-free capability at relatively low cost. However, its separate dual core structure is a weakness when facing concentrated EM attacks where a tiny EM probe can be precisely positioned closer to one of the two cores. In this paper, we present an PA-DPL dual-core interleaved structure to strengthen resistance against sophisticated EM attacks on Xilinx FPGA implementations. The main merit of the proposed structure is that every two routing in each signal pair are kept identical even the dual cores are interleaved together. By minimizing the distance between the complementary routings and instances of both cores, even the concentrated EM measurement cannot easily distinguish the minor EM field unbalance. In PA- DPL, EPE is avoided by compressing the evaluation phase to a small portion of the clock period, therefore, the speed is inevitably limited. Regarding this, we made an improvement to extend the duty cycle of evaluation phase to more than 40 percent, yielding a larger maximum working frequency. The detailed design flow is also presented. We validate the security improvement against EM attack by implementing a simplified AES co-processor in Virtex-5 FPGA.

In situ control of Si(100) and Ge(100) surface preparation for the heteroepitaxy of III-V solar cell architectures

Si(100) and Ge(100) substrates essential for subsequent III-V integration were studied in the hydrogen ambient of a metalorganic vapor phase epitaxy reactor. Reflectance anisotropy spectroscopy (RAS) enabled us to distinguish characteristic configurations of vicinal Si(100) in situ: covered with oxide, cleaned by thermal removing in H2, and terminated with monohydrides when cooling in H2 ambient. RAS measurements during cooling in H2 ambient after the oxide removal process revealed a transition from the clean to the monohydride terminated Si(100) surface dependent on process temperature. For vicinal Ge(100) we observed a characteristic RA spectrum after annealing and cooling in H2 ambient. According to results from X-ray photo electron spectroscopy and Fourier-transform infrared spectroscopy the spectrum corresponds to the monohydride terminated Ge(100) surface.

Calibration process on the study of new antenna array architectures for space communications

This paper introduces novel calibration processes applied to antenna arrays with new architectures and technologies designed to improve the performance of traditional earth stations for satellite communications due to the increasing requirement of data capacity during last decades. Besides, the Radiation Group from the Technical University of Madrid has been working on the development of new antenna arrays based on novel architecture and technologies along many projects as a solution for the ground segment in the early future. Nowadays, the calibration process is an interesting and cutting edge research field in a period of expansion with a lot of work to do for calibration in transmission and also for reception of these novel antennas under development.

Survey of architectures and optimizations for wide bandwidth envelope amplifier

In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration(EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application. The power topologies will be explored and several important parameters such as efficiency, bandwidth will be discussed.

Architectures for Video-on-Demand content distribution in managed networks

La demanda de contenidos de vídeo ha aumentado rápidamente en los últimos años como resultado del gran despliegue de la TV sobre IP (IPTV) y la variedad de servicios ofrecidos por los operadores de red. Uno de los servicios que se ha vuelto especialmente atractivo para los clientes es el vídeo bajo demanda (VoD) en tiempo real, ya que ofrece una transmisión (streaming) inmediata de gran variedad de contenidos de vídeo. El precio que los operadores tienen que pagar por este servicio es el aumento del tráfico en las redes, que están cada vez más congestionadas debido a la mayor demanda de contenidos de VoD y al aumento de la calidad de los propios contenidos de vídeo. Así, uno de los principales objetivos de esta tesis es encontrar soluciones que reduzcan el tráfico en el núcleo de la red, manteniendo la calidad del servicio en el nivel adecuado y reduciendo el coste del tráfico. La tesis propone un sistema jerárquico de servidores de streaming en el que se ejecuta un algoritmo para la ubicación óptima de los contenidos de acuerdo con el comportamiento de los usuarios y el estado de la red. Debido a que cualquier algoritmo óptimo de distribución de contenidos alcanza un límite en el que no se puede llegar a nuevas mejoras, la inclusión de los propios clientes del servicio (los peers) en el proceso de streaming puede reducir aún más el tráfico de red. Este proceso se logra aprovechando el control que el operador tiene en las redes de gestión privada sobre los equipos receptores (Set-Top Box) ubicados en las instalaciones de los clientes. El operador se reserva cierta capacidad de almacenamiento y streaming de los peers para almacenar los contenidos de vídeo y para transmitirlos a otros clientes con el fin de aliviar a los servidores de streaming. Debido a la incapacidad de los peers para sustituir completamente a los servidores de streaming, la tesis propone un sistema de streaming asistido por peers. Algunas de las cuestiones importantes que se abordan en la tesis son saber cómo los parámetros del sistema y las distintas distribuciones de los contenidos de vídeo en los peers afectan al rendimiento general del sistema. Para dar respuesta a estas preguntas, la tesis propone un modelo estocástico preciso y flexible que tiene en cuenta parámetros como las capacidades de enlace de subida y de almacenamiento de los peers, el número de peers, el tamaño de la biblioteca de contenidos de vídeo, el tamaño de los contenidos y el esquema de distribución de contenidos para estimar los beneficios del streaming asistido por los peers. El trabajo también propone una versión extendida del modelo matemático mediante la inclusión de la probabilidad de fallo de los peers y su tiempo de recuperación en el conjunto de parámetros del modelo. Estos modelos se utilizan como una herramienta para la realización de exhaustivos análisis del sistema de streaming de VoD asistido por los peers para la amplia gama de parámetros definidos en los modelos. Abstract The demand of video contents has rapidly increased in the past years as a result of the wide deployment of IPTV and the variety of services offered by the network operators. One of the services that has especially become attractive to the customers is real-time Video on Demand (VoD) because it offers an immediate streaming of a large variety of video contents. The price that the operators have to pay for this convenience is the increased traffic in the networks, which are becoming more congested due to the higher demand for VoD contents and the increased quality of the videos. Therefore, one of the main objectives of this thesis is finding solutions that would reduce the traffic in the core of the network, keeping the quality of service on satisfactory level and reducing the traffic cost. The thesis proposes a system of hierarchical structure of streaming servers that runs an algorithm for optimal placement of the contents according to the users’ behavior and the state of the network. Since any algorithm for optimal content distribution reaches a limit upon which no further improvements can be made, including service customers themselves (the peers) in the streaming process can further reduce the network traffic. This process is achieved by taking advantage of the control that the operator has in the privately managed networks over the Set-Top Boxes placed at the clients’ premises. The operator reserves certain storage and streaming capacity on the peers to store the video contents and to stream them to the other clients in order to alleviate the streaming servers. Because of the inability of the peers to completely substitute the streaming servers, the thesis proposes a system for peer-assisted streaming. Some of the important questions addressed in the thesis are how the system parameters and the various distributions of the video contents on the peers would impact the overall system performance. In order to give answers to these questions, the thesis proposes a precise and flexible stochastic model that takes into consideration parameters like uplink and storage capacity of the peers, number of peers, size of the video content library, size of contents and content distribution scheme to estimate the benefits of the peer-assisted streaming. The work also proposes an extended version of the mathematical model by including the failure probability of the peers and their recovery time in the set of parameters. These models are used as tools for conducting thorough analyses of the peer-assisted system for VoD streaming for the wide range of defined parameters.

Provisión de servicios de procesado de imágenes basados en arquitecturas orientadas a servicios

Con este proyecto se pretende crear un procedimiento general para la implantación de aplicaciones de procesado de imágenes en cámaras de video IP y la distribución de dicha información mediante Arquitecturas Orientadas a Servicios (SOA). El objetivo principal es crear una aplicación que se ejecute en una cámara de video IP y realice un procesado básico sobre las imágenes capturadas (detección de colores, formas y patrones) permitiendo distribuir el resultado del procesado mediante las arquitecturas SOA descritas en la especificación DPWS (Device Profile for Web Services). El estudio se va a centrar principalmente en la transformación automática de código de procesado de imágenes escrito en Matlab (archivos .m) a un código C ANSI (archivos .c) que posteriormente se compilará para la arquitectura del procesador de la cámara (arquitectura CRIS, similar a la RISC pero con un conjunto reducido de instrucciones). ABSTRACT. This project aims to create a general procedure for the implementation of image processing applications in IP video cameras and the distribution of such information through Service Oriented Architectures (SOA). The main goal is to create an application that runs on IP video camera and carry out a basic processing on the captured images ( color detection, shapes and patterns) allowing to distribute the result of process by SOA architectures described in the DPWS specification (Device Profile for Web Services). The study will focus primarily on the automated transform of image processing code written in Matlab files (. M) to ANSI C code files (. C) which is then compiled to the processor architecture of the camera (CRIS architecture , similar to the RISC but with a reduced instruction set).

Design and Validation of an Optimized MB-OFDM Ultra Wideband Transceiver System

Esta tesis está incluida dentro del campo del campo de Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband (MB-OFDM UWB), el cual ha adquirido una gran importancia en las comunicaciones inalámbricas de alta tasa de datos en la última década. UWB surgió con el objetivo de satisfacer la creciente demanda de conexiones inalámbricas en interiores y de uso doméstico, con bajo coste y alta velocidad. La disponibilidad de un ancho de banda grande, el potencial para alta velocidad de transmisión, baja complejidad y bajo consumo de energía, unido al bajo coste de implementación, representa una oportunidad única para que UWB se convierta en una solución ampliamente utilizada en aplicaciones de Wireless Personal Area Network (WPAN). UWB está definido como cualquier transmisión que ocupa un ancho de banda de más de 20% de su frecuencia central, o más de 500 MHz. En 2002, la Comisión Federal de Comunicaciones (FCC) definió que el rango de frecuencias de transmisión de UWB legal es de 3.1 a 10.6 GHz, con una energía de transmisión de -41.3 dBm/Hz. Bajo las directrices de FCC, el uso de la tecnología UWB puede aportar una enorme capacidad en las comunicaciones de corto alcance. Considerando las ecuaciones de capacidad de Shannon, incrementar la capacidad del canal requiere un incremento lineal en el ancho de banda, mientras que un aumento similar de la capacidad de canal requiere un aumento exponencial en la energía de transmisión. En los últimos años, s diferentes desarrollos del UWB han sido extensamente estudiados en diferentes áreas, entre los cuales, el protocolo de comunicaciones inalámbricas MB-OFDM UWB está considerado como la mejor elección y ha sido adoptado como estándar ISO/IEC para los WPANs. Combinando la modulación OFDM y la transmisión de datos utilizando las técnicas de salto de frecuencia, el sistema MB-OFDM UWB es capaz de soportar tasas de datos con que pueden variar de los 55 a los 480 Mbps, alcanzando una distancia máxima de hasta 10 metros. Se esperara que la tecnología MB-OFDM tenga un consumo energético muy bajo copando un are muy reducida en silicio, proporcionando soluciones de bajo coste que satisfagan las demandas del mercado. Para cumplir con todas estas expectativas, el desarrollo y la investigación del MBOFDM UWB deben enfrentarse a varios retos, como son la sincronización de alta sensibilidad, las restricciones de baja complejidad, las estrictas limitaciones energéticas, la escalabilidad y la flexibilidad. Tales retos requieren un procesamiento digital de la señal de última generación, capaz de desarrollar sistemas que puedan aprovechar por completo las ventajas del espectro UWB y proporcionar futuras aplicaciones inalámbricas en interiores. Esta tesis se centra en la completa optimización de un sistema de transceptor de banda base MB-OFDM UWB digital, cuyo objetivo es investigar y diseñar un subsistema de comunicación inalámbrica para la aplicación de las Redes de Sensores Inalámbricas Visuales. La complejidad inherente de los procesadores FFT/IFFT y el sistema de sincronización así como la alta frecuencia de operación para todos los elementos de procesamiento, se convierten en el cuello de la botella para el diseño y la implementación del sistema de UWB digital en base de banda basado en MB-OFDM de baja energía. El objetivo del transceptor propuesto es conseguir baja energía y baja complejidad bajo la premisa de un alto rendimiento. Las optimizaciones están realizadas tanto a nivel algorítmico como a nivel arquitectural para todos los elementos del sistema. Una arquitectura hardware eficiente en consumo se propone en primer lugar para aquellos módulos correspondientes a núcleos de computación. Para el procesado de la Transformada Rápida de Fourier (FFT/IFFT), se propone un algoritmo mixed-radix, basado en una arquitectura con pipeline y se ha desarrollado un módulo de Decodificador de Viterbi (VD) equilibrado en coste-velocidad con el objetivo de reducir el consumo energético e incrementar la velocidad de procesamiento. También se ha implementado un correlador signo-bit simple basado en la sincronización del tiempo de símbolo es presentado. Este correlador es usado para detectar y sincronizar los paquetes de OFDM de forma robusta y precisa. Para el desarrollo de los subsitemas de procesamiento y realizar la integración del sistema completo se han empleado tecnologías de última generación. El dispositivo utilizado para el sistema propuesto es una FPGA Virtex 5 XC5VLX110T del fabricante Xilinx. La validación el propuesta para el sistema transceptor se ha implementado en dicha placa de FPGA. En este trabajo se presenta un algoritmo, y una arquitectura, diseñado con filosofía de co-diseño hardware/software para el desarrollo de sistemas de FPGA complejos. El objetivo principal de la estrategia propuesta es de encontrar una metodología eficiente para el diseño de un sistema de FPGA configurable optimizado con el empleo del mínimo esfuerzo posible en el sistema de procedimiento de verificación, por tanto acelerar el periodo de desarrollo del sistema. La metodología de co-diseño presentada tiene la ventaja de ser fácil de usar, contiene todos los pasos desde la propuesta del algoritmo hasta la verificación del hardware, y puede ser ampliamente extendida para casi todos los tipos de desarrollos de FPGAs. En este trabajo se ha desarrollado sólo el sistema de transceptor digital de banda base por lo que la comprobación de señales transmitidas a través del canal inalámbrico en los entornos reales de comunicación sigue requiriendo componentes RF y un front-end analógico. No obstante, utilizando la metodología de co-simulación hardware/software citada anteriormente, es posible comunicar el sistema de transmisor y el receptor digital utilizando los modelos de canales propuestos por IEEE 802.15.3a, implementados en MATLAB. Por tanto, simplemente ajustando las características de cada modelo de canal, por ejemplo, un incremento del retraso y de la frecuencia central, podemos estimar el comportamiento del sistema propuesto en diferentes escenarios y entornos. Las mayores contribuciones de esta tesis son: • Se ha propuesto un nuevo algoritmo 128-puntos base mixto FFT usando la arquitectura pipeline multi-ruta. Los complejos multiplicadores para cada etapa de procesamiento son diseñados usando la arquitectura modificada shiftadd. Los sistemas word length y twiddle word length son comparados y seleccionados basándose en la señal para cuantización del SQNR y el análisis de energías. • El desempeño del procesador IFFT es analizado bajo diferentes situaciones aritméticas de bloques de punto flotante (BFP) para el control de desbordamiento, por tanto, para encontrar la arquitectura perfecta del algoritmo IFFT basado en el procesador FFT propuesto. • Para el sistema de receptor MB-OFDM UWB se ha empleado una sincronización del tiempo innovadora, de baja complejidad y esquema de compensación, que consiste en funciones de Detector de Paquetes (PD) y Estimación del Offset del tiempo. Simplificando el cross-correlation y maximizar las funciones probables solo a sign-bit, la complejidad computacional se ve reducida significativamente. • Se ha propuesto un sistema de decodificadores Viterbi de 64 estados de decisión-débil usando velocidad base-4 de arquitectura suma-comparaselecciona. El algoritmo Two-pointer Even también es introducido en la unidad de rastreador de origen con el objetivo de conseguir la eficiencia en el hardware. • Se han integrado varias tecnologías de última generación en el completo sistema transceptor basebanda , con el objetivo de implementar un sistema de comunicación UWB altamente optimizado. • Un diseño de flujo mejorado es propuesto para el complejo sistema de implementación, el cual puede ser usado para diseños de Cadena de puertas de campo programable general (FPGA). El diseño mencionado no sólo reduce dramáticamente el tiempo para la verificación funcional, sino también provee un análisis automático como los errores del retraso del output para el sistema de hardware implementado. • Un ambiente de comunicación virtual es establecido para la validación del propuesto sistema de transceptores MB-OFDM. Este método es provisto para facilitar el uso y la conveniencia de analizar el sistema digital de basebanda sin parte frontera analógica bajo diferentes ambientes de comunicación. Esta tesis doctoral está organizada en seis capítulos. En el primer capítulo se encuentra una breve introducción al campo del UWB, tanto relacionado con el proyecto como la motivación del desarrollo del sistema de MB-OFDM. En el capítulo 2, se presenta la información general y los requisitos del protocolo de comunicación inalámbrica MBOFDM UWB. En el capítulo 3 se habla de la arquitectura del sistema de transceptor digital MB-OFDM de banda base . El diseño del algoritmo propuesto y la arquitectura para cada elemento del procesamiento está detallado en este capítulo. Los retos de diseño del sistema que involucra un compromiso de discusión entre la complejidad de diseño, el consumo de energía, el coste de hardware, el desempeño del sistema, y otros aspectos. En el capítulo 4, se ha descrito la co-diseñada metodología de hardware/software. Cada parte del flujo del diseño será detallado con algunos ejemplos que se ha hecho durante el desarrollo del sistema. Aprovechando esta estrategia de diseño, el procedimiento de comunicación virtual es llevado a cabo para probar y analizar la arquitectura del transceptor propuesto. Los resultados experimentales de la co-simulación y el informe sintético de la implementación del sistema FPGA son reflejados en el capítulo 5. Finalmente, en el capítulo 6 se incluye las conclusiones y los futuros proyectos, y también los resultados derivados de este proyecto de doctorado. ABSTRACT In recent years, the Wireless Visual Sensor Network (WVSN) has drawn great interest in wireless communication research area. They enable a wealth of new applications such as building security control, image sensing, and target localization. However, nowadays wireless communication protocols (ZigBee, Wi-Fi, and Bluetooth for example) cannot fully satisfy the demands of high data rate, low power consumption, short range, and high robustness requirements. New communication protocol is highly desired for such kind of applications. The Ultra Wideband (UWB) wireless communication protocol, which has increased in importance for high data rate wireless communication field, are emerging as an important topic for WVSN research. UWB has emerged as a technology that offers great promise to satisfy the growing demand for low-cost, high-speed digital wireless indoor and home networks. The large bandwidth available, the potential for high data rate transmission, and the potential for low complexity and low power consumption, along with low implementation cost, all present a unique opportunity for UWB to become a widely adopted radio solution for future Wireless Personal Area Network (WPAN) applications. UWB is defined as any transmission that occupies a bandwidth of more than 20% of its center frequency, or more than 500 MHz. In 2002, the Federal Communications Commission (FCC) has mandated that UWB radio transmission can legally operate in the range from 3.1 to 10.6 GHz at a transmitter power of －41.3 dBm/Hz. Under the FCC guidelines, the use of UWB technology can provide enormous capacity over short communication ranges. Considering Shannon’s capacity equations, increasing the channel capacity requires linear increasing in bandwidth, whereas similar channel capacity increases would require exponential increases in transmission power. In recent years, several different UWB developments has been widely studied in different area, among which, the MB-OFDM UWB wireless communication protocol is considered to be the leading choice and has recently been adopted in the ISO/IEC standard for WPANs. By combing the OFDM modulation and data transmission using frequency hopping techniques, the MB-OFDM UWB system is able to support various data rates, ranging from 55 to 480 Mbps, over distances up to 10 meters. The MB-OFDM technology is expected to consume very little power and silicon area, as well as provide low-cost solutions that can satisfy consumer market demands. To fulfill these expectations, MB-OFDM UWB research and development have to cope with several challenges, which consist of high-sensitivity synchronization, low- complexity constraints, strict power limitations, scalability, and flexibility. Such challenges require state-of-the-art digital signal processing expertise to develop systems that could fully take advantages of the UWB spectrum and support future indoor wireless applications. This thesis focuses on fully optimization for the MB-OFDM UWB digital baseband transceiver system, aiming at researching and designing a wireless communication subsystem for the Wireless Visual Sensor Networks (WVSNs) application. The inherent high complexity of the FFT/IFFT processor and synchronization system, and high operation frequency for all processing elements, becomes the bottleneck for low power MB-OFDM based UWB digital baseband system hardware design and implementation. The proposed transceiver system targets low power and low complexity under the premise of high performance. Optimizations are made at both algorithm and architecture level for each element of the transceiver system. The low-power hardwareefficient structures are firstly proposed for those core computation modules, i.e., the mixed-radix algorithm based pipelined architecture is proposed for the Fast Fourier Transform (FFT/IFFT) processor, and the cost-speed balanced Viterbi Decoder (VD) module is developed, in the aim of lowering the power consumption and increasing the processing speed. In addition, a low complexity sign-bit correlation based symbol timing synchronization scheme is presented so as to detect and synchronize the OFDM packets robustly and accurately. Moreover, several state-of-the-art technologies are used for developing other processing subsystems and an entire MB-OFDM digital baseband transceiver system is integrated. The target device for the proposed transceiver system is Xilinx Virtex 5 XC5VLX110T FPGA board. In order to validate the proposed transceiver system in the FPGA board, a unified algorithm-architecture-circuit hardware/software co-design environment for complex FPGA system development is presented in this work. The main objective of the proposed strategy is to find an efficient methodology for designing a configurable optimized FPGA system by using as few efforts as possible in system verification procedure, so as to speed up the system development period. The presented co-design methodology has the advantages of easy to use, covering all steps from algorithm proposal to hardware verification, and widely spread for almost all kinds of FPGA developments. Because only the digital baseband transceiver system is developed in this thesis, the validation of transmitting signals through wireless channel in real communication environments still requires the analog front-end and RF components. However, by using the aforementioned hardware/software co-simulation methodology, the transmitter and receiver digital baseband systems get the opportunity to communicate with each other through the channel models, which are proposed from the IEEE 802.15.3a research group, established in MATLAB. Thus, by simply adjust the characteristics of each channel model, e.g. mean excess delay and center frequency, we can estimate the transmission performance of the proposed transceiver system through different communication situations. The main contributions of this thesis are: • A novel mixed radix 128-point FFT algorithm by using multipath pipelined architecture is proposed. The complex multipliers for each processing stage are designed by using modified shift-add architectures. The system wordlength and twiddle word-length are compared and selected based on Signal to Quantization Noise Ratio (SQNR) and power analysis. • IFFT processor performance is analyzed under different Block Floating Point (BFP) arithmetic situations for overflow control, so as to find out the perfect architecture of IFFT algorithm based on the proposed FFT processor. • An innovative low complex timing synchronization and compensation scheme, which consists of Packet Detector (PD) and Timing Offset Estimation (TOE) functions, for MB-OFDM UWB receiver system is employed. By simplifying the cross-correlation and maximum likelihood functions to signbit only, the computational complexity is significantly reduced. • A 64 state soft-decision Viterbi Decoder system by using high speed radix-4 Add-Compare-Select architecture is proposed. Two-pointer Even algorithm is also introduced into the Trace Back unit in the aim of hardware-efficiency. • Several state-of-the-art technologies are integrated into the complete baseband transceiver system, in the aim of implementing a highly-optimized UWB communication system. • An improved design flow is proposed for complex system implementation which can be used for general Field-Programmable Gate Array (FPGA) designs. The design method not only dramatically reduces the time for functional verification, but also provides automatic analysis such as errors and output delays for the implemented hardware systems. • A virtual communication environment is established for validating the proposed MB-OFDM transceiver system. This methodology is proved to be easy for usage and convenient for analyzing the digital baseband system without analog frontend under different communication environments. This PhD thesis is organized in six chapters. In the chapter 1 a brief introduction to the UWB field, as well as the related work, is done, along with the motivation of MBOFDM system development. In the chapter 2, the general information and requirement of MB-OFDM UWB wireless communication protocol is presented. In the chapter 3, the architecture of the MB-OFDM digital baseband transceiver system is presented. The design of the proposed algorithm and architecture for each processing element is detailed in this chapter. Design challenges of such system involve trade-off discussions among design complexity, power consumption, hardware cost, system performance, and some other aspects. All these factors are analyzed and discussed. In the chapter 4, the hardware/software co-design methodology is proposed. Each step of this design flow will be detailed by taking some examples that we met during system development. Then, taking advantages of this design strategy, the Virtual Communication procedure is carried out so as to test and analyze the proposed transceiver architecture. Experimental results from the co-simulation and synthesis report of the implemented FPGA system are given in the chapter 5. The chapter 6 includes conclusions and future work, as well as the results derived from this PhD work.

Middleware architectures for the Smart Grid : survey and challenges in the foreseeable future

The traditional power grid is just a one-way supplier that gets no feedback data about the energy delivered, what tariffs could be the most suitable ones for customers, the shifting daily needs of electricity in a facility, etc. Therefore, it is only natural that efforts are being invested in improving power grid behavior and turning it into a Smart Grid. However, to this end, several components have to be either upgraded or created from scratch. Among the new components required, middleware appears as a critical one, for it will abstract all the diversity of the used devices for power transmission (smart meters, embedded systems, etc.) and will provide the application layer with a homogeneous interface involving power production and consumption management data that were not able to be provided before. Additionally, middleware is expected to guarantee that updates to the current metering infrastructure (changes in service or hardware availability) or any added legacy measuring appliance will get acknowledged for any future request. Finally, semantic features are of major importance to tackle scalability and interoperability issues. A survey on the most prominent middleware architectures for Smart Grids is presented in this paper, along with an evaluation of their features and their strong points and weaknesses.

Photonic switching architectures with logic cells

Possible switching architectures, with Optically Programmable Logic Cells - OPLCs - will be reported in this paper. These basic units, previously employed by us for some other applications mainly in optical computing, will be employed as main elements to switch optical communications signals. The main aspect to be considered is that because the nternal components of these cells have nonlinear behaviors, namely either pure bistable or SEED-like properties, several are the possibilities to be obtained. Moreover, because their properties are dependent, under certain condition, of the signal wavelength, they are apt to be employed in WDM systems and the final result will depend on the orresponding optical signal frequency. We will give special emphasis to the case where self-routing is achieved, namely to structures of the Batcher or Banyan type. In these cases, as it will be shown, there is the possibility to route any packet input to a certain direction according to its first bits. The number of possible outputs gives the number of bits needed to route signals. An advantage of this configuration is that a very versatile behavior may be allowed. The main one is the possibility to obtain configurations with different kinds of behavior, namely, Strictly Nonblocking, Wide-Sense Nonblocking or Rearrangeably Nonblocking as well as to eliminate switching conflicts at a certain intermediate stages.

On correctness in RDF stream processor benchmarking

Two complementary benchmarks have been proposed so far for the evaluation and continuous improvement of RDF stream processors: SRBench and LSBench. They put a special focus on different features of the evaluated systems, including coverage of the streaming extensions of SPARQL supported by each processor, query processing throughput, and an early analysis of query evaluation correctness, based on comparing the results obtained by different processors for a set of queries. However, none of them has analysed the operational semantics of these processors in order to assess the correctness of query evaluation results. In this paper, we propose a characterization of the operational semantics of RDF stream processors, adapting well-known models used in the stream processing engine community: CQL and SECRET. Through this formalization, we address correctness in RDF stream processor benchmarks, allowing to determine the multiple answers that systems should provide. Finally, we present CSRBench, an extension of SRBench to address query result correctness verification using an automatic method.

Network assisted content protection architectures for a connected world

Content protection is a key component for the success of a multimedia services platform, as proven by the plethora of solutions currently on the market. In this paper we analyze a new network scenario where permanent bidirectional connectivity and video-aware encryption technologies allow a trustful operation of ubiquitous end devices. We propose new scalable models for a content protection architecture that may achieve dramatic improvement in robustness, reliability, and scalability. Selective ciphering and countermeasures are included in those models, together with several examples of their application.

Nuevas arquitecturas de transpondedores de microondas = New transponder architectures at microwave frequencies = Nouvelles architectures des transpondeurs d’hyperfréquences

En la última década, los sistemas de telecomunicación de alta frecuencia han evolucionado tremendamente. Las bandas de frecuencias, los anchos de banda del usuario, las técnicas de modulación y otras características eléctricas están en constante cambio de acuerdo a la evolución de la tecnología y la aparición de nuevas aplicaciones. Las arquitecturas de los transceptores modernos son diferentes de las tradicionales. Muchas de las funciones convencionalmente realizadas por circuitos analógicos han sido asignadas gradualmente a procesadores digitales de señal, de esta manera, las fronteras entre la banda base y las funcionalidades de RF se difuminan. Además, los transceptores inalámbricos digitales modernos son capaces de soportar protocolos de datos de alta velocidad, por lo que emplean una elevada escala de integración para muchos de los subsistemas que componen las diferentes etapas. Uno de los objetivos de este trabajo de investigación es realizar un estudio de las nuevas configuraciones en el desarrollo de demostradores de radiofrecuencia (un receptor y un transmisor) y transpondedores para fines de comunicaciones y militares, respectivamente. Algunos trabajos se han llevado a cabo en el marco del proyecto TECRAIL, donde se ha implementado un demostrador de la capa física LTE para evaluar la viabilidad del estándar LTE en el entorno ferroviario. En el ámbito militar y asociado al proyecto de calibración de radares (CALRADAR), se ha efectuado una actividad importante en el campo de la calibración de radares balísticos Doppler donde se ha analizado cuidadosamente su precisión y se ha desarrollado la unidad generadora de Doppler de un patrón electrónico para la calibración de estos radares. Dicha unidad Doppler es la responsable de la elevada resolución en frecuencia del generador de “blancos” radar construido. Por otro lado, se ha elaborado un análisis completo de las incertidumbres del sistema para optimizar el proceso de calibración. En una segunda fase se han propuesto soluciones en el desarrollo de dispositivos electro-ópticos para aplicaciones de comunicaciones. Estos dispositivos son considerados, debido a sus ventajas, tecnologías de soporte para futuros dispositivos y subsistemas de RF/microondas. Algunas demandas de radio definida por software podrían cubrirse aplicando nuevos conceptos de circuitos sintonizables mediante parámetros programables de un modo dinámico. También se ha realizado una contribución relacionada con el diseño de filtros paso banda con topología “Hairpin”, los cuales son compactos y se pueden integrar fácilmente en circuitos de microondas en una amplia gama de aplicaciones destinadas a las comunicaciones y a los sistemas militares. Como importante aportación final, se ha presentado una propuesta para ecualizar y mejorar las transmisiones de señales discretas de temporización entre los TRMs y otras unidades de procesamiento, en el satélite de última generación SEOSAR/PAZ. Tras un análisis exhaustivo, se ha obtenido la configuración óptima de los buses de transmisión de datos de alta velocidad basadas en una red de transceptores. ABSTRACT In the last decade, high-frequency telecommunications systems have extremely evolved. Frequency bands, user bandwidths, modulation techniques and other electrical characteristics of these systems are constantly changing following to the evolution of technology and the emergence of new applications. The architectures of modern transceivers are different from the traditional ones. Many of the functions conventionally performed by analog circuitry have gradually been assigned to digital signal processors. In this way, boundaries between baseband and RF functionalities are diffused. The design of modern digital wireless transceivers are capable of supporting high-speed data protocols. Therefore, a high integration scale is required for many of the components in the block chain. One of the goals of this research work is to investigate new configurations in the development of RF demonstrators (a receiver and a transmitter) and transponders for communications and military purposes, respectively. A LTE physical layer demonstrator has been implemented to assess the viability of LTE in railway scenario under the framework of the TECRAIL project. An important activity, related to the CALRADAR project, for the calibration of Doppler radars with extremely high precision has been performed. The contribution is the Doppler unit of the radar target generator developed that reveals a high frequency resolution. In order to assure the accuracy of radar calibration process, a complete analysis of the uncertainty in the above mentioned procedure has been carried out. Another important research topic has been the development of photonic devices that are considered enabling technologies for future RF and microwave devices and subsystems. Some Software Defined Radio demands are addressed by the proposed novel circuit concepts based on photonically tunable elements with dynamically programmable parameters. A small contribution has been made in the field of Hairpin-line bandpass filters. These filters are compact and can also be easily integrated into microwave circuits finding a wide range of applications in communication and military systems. In this research field, the contributions made have been the improvements in the design and the simulations of wideband filters. Finally, an important proposal to balance and enhance transmissions of discrete timing signals between TRMs and other processing units into the state of the art SEOSAR/PAZ Satellite has been carried out obtaining the optimal configuration of the high-speed data transmission buses based on a transceiver network. RÉSUMÉ Les systèmes d'hyperfréquence dédiés aux télécommunications ont beaucoup évolué dans la dernière décennie. Les bandes de fréquences, les bandes passantes par utilisateur, les techniques de modulation et d'autres caractéristiques électriques sont en constant changement en fonction de l'évolution des technologies et l'émergence de nouvelles applications. Les architectures modernes des transcepteurs sont différentes des traditionnelles. Un grand nombre d’opérations normalement effectuées par les circuits analogiques a été progressivement alloué à des processeurs de signaux numériques. Ainsi, les frontières entre la bande de base et la fonctionnalité RF sont floues. Les transcepteurs sans fils numériques modernes sont capables de transférer des données à haute vitesse selon les différents protocoles de communication utilisés. C'est pour cette raison qu’un niveau élevé d'intégration est nécessaire pour un grand nombre de composants qui constitue les différentes étapes des systèmes. L'un des objectifs de cette recherche est d'étudier les nouvelles configurations dans le développement des démonstrateurs RF (récepteur et émetteur) et des transpondeurs à des fins militaire et de communication. Certains travaux ont été réalisés dans le cadre du projet TECRAIL, où un démonstrateur de la couche physique LTE a été mis en place pour évaluer la faisabilité de la norme LTE dans l'environnement ferroviaire. Une contribution importante, liée au projet CALRADAR, est proposée dans le domaine des systèmes d’étalonnage de radar Doppler de haute précision. Cette contribution est le module Doppler de génération d’hyperfréquence intégré dans le système électronique de génération de cibles radar virtuelles que présente une résolution de fréquence très élevée. Une analyse complète de l'incertitude dans l'étalonnage des radars Doppler a été effectuée, afin d'assurer la précision du calibrage. La conception et la mise en oeuvre de quelques dispositifs photoniques sont un autre sujet important du travail de recherche présenté dans cette thèse. De tels dispositifs sont considérés comme étant des technologies habilitantes clés pour les futurs dispositifs et sous-systèmes RF et micro-ondes grâce à leurs avantages. Certaines demandes de radio définies par logiciel pourraient être supportées par nouveaux concepts de circuits basés sur des éléments dynamiquement programmables en utilisant des paramètres ajustables. Une petite contribution a été apportée pour améliorer la conception et les simulations des filtres passe-bande Hairpin à large bande. Ces filtres sont compacts et peuvent également être intégrés dans des circuits à micro-ondes compatibles avec un large éventail d'applications dans les systèmes militaires et de communication. Finalement, une proposition a été effectuée visant à équilibrer et améliorer la transmission des signaux discrets de synchronisation entre les TRMs et d'autres unités de traitement dans le satellite SEOSAR/PAZ de dernière génération et permettant l’obtention de la configuration optimale des bus de transmission de données à grande vitesse basés sur un réseau de transcepteurs.

UML 1.4 versus UML 2.0 as Languages to Describe Software Architectures.

ML 1.4 is widely accepted as the standard for representing the various software artifacts generated by a development process. For this reason, there have been attempts to use this language to represent the software architec- ture of systems as well. Unfortunately, these attempts have ended in representa- tions (boxes and lines) already criticized by the software architecture commu- nity. Recently, OMG has published a draft that will constitute the future UML 2.0 specification. In this paper we compare the capacities of UML 1.4 and UML 2.0 to describe software architectures. In particular, we study extensions of both UML versions to describe the static view of the C3 architectural style (a simplification of the C2 style). One of the results of this study is the difficulties found when using the UML 2.0 metamodel to describe the concept of connector in a software architecture.