Investigation of aspect ratio of hole drilling from micro to nanoscale via focused ion beam fine milling

Holes with different sizes from microscale to nanoscale were directly fabricated by focused ion beam (FIB) milling in this paper. Maximum aspect ratio of the fabricated holes can be 5:1 for the hole with large size with pure FIB milling, 10:1 for gas assistant etching, and 1:1 for the hole with size below 100 nm. A phenomenon of volume swell at the boundary of the hole was observed. The reason maybe due to the dose dependence of the effective sputter yield in low intensity Gaussian beam tail regions and redeposition. Different materials were used to investigate variation of the aspect ratio. The results show that for some special material, such as Ni-Be, the corresponding aspect ratio can reach 13.8:1 with Cl₂ assistant etching, but only 0.09:1 for Si(100) with single scan of the FIB.

Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic

The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers. In this work we present a number of new CMOS logic families, Charge Recovery Logic (CRL) as well as the much improved Split-Level Charge Recovery Logic (SCRL), within which the transfer of charge between the nodes occurs quasistatically. Operating quasistatically, these logic families have an energy dissipation that drops linearly with operating frequency, i.e., their power consumption drops quadratically with operating frequency as opposed to the linear drop of conventional CMOS. The circuit techniques in these new families rely on constructing an explicitly reversible pipelined logic gate, where the information necessary to recover the energy used to compute a value is provided by computing its logical inverse. Information necessary to uncompute the inverse is available from the subsequent inverse logic stage. We demonstrate the low energy operation of SCRL by presenting the results from the testing of the first fully quasistatic 8 x 8 multiplier chip (SCRL-1) employing SCRL circuit techniques.