Reconfigurable Architectures for General-Purpose Computing

General-purpose computing devices allow us to (1) customize computation after fabrication and (2) conserve area by reusing expensive active circuitry for different functions in time. We define RP-space, a restricted domain of the general-purpose architectural space focussed on reconfigurable computing architectures. Two dominant features differentiate reconfigurable from special-purpose architectures and account for most of the area overhead associated with RP devices: (1) instructions which tell the device how to behave, and (2) flexible interconnect which supports task dependent dataflow between operations. We can characterize RP-space by the allocation and structure of these resources and compare the efficiencies of architectural points across broad application characteristics. Conventional FPGAs fall at one extreme end of this space and their efficiency ranges over two orders of magnitude across the space of application characteristics. Understanding RP-space and its consequences allows us to pick the best architecture for a task and to search for more robust design points in the space. Our DPGA, a fine- grained computing device which adds small, on-chip instruction memories to FPGAs is one such design point. For typical logic applications and finite- state machines, a DPGA can implement tasks in one-third the area of a traditional FPGA. TSFPGA, a variant of the DPGA which focuses on heavily time-switched interconnect, achieves circuit densities close to the DPGA, while reducing typical physical mapping times from hours to seconds. Rigid, fabrication-time organization of instruction resources significantly narrows the range of efficiency for conventional architectures. To avoid this performance brittleness, we developed MATRIX, the first architecture to defer the binding of instruction resources until run-time, allowing the application to organize resources according to its needs. Our focus MATRIX design point is based on an array of 8-bit ALU and register-file building blocks interconnected via a byte-wide network. With today's silicon, a single chip MATRIX array can deliver over 10 Gop/s (8-bit ops). On sample image processing tasks, we show that MATRIX yields 10-20x the computational density of conventional processors. Understanding the cost structure of RP-space helps us identify these intermediate architectural points and may provide useful insight more broadly in guiding our continual search for robust and efficient general-purpose computing structures.

An Assessment of the Degree of Implementation of the Lean Aerospace Initiative Principles and Practices within the US Aerospace and Defense Industry

This report is a formal documentation of the results of an assessment of the degree to which Lean Principles and Practices have been implemented in the US Aerospace and Defense Industry. An Industry Association team prepared it for the DCMA-DCAAIndustry Association “Crosstalk” Coalition in response to a “Crosstalk” meeting action request to the industry associations. The motivation of this request was provided by the many potential benefits to system product quality, affordability and industry responsiveness, which a high degree of industry Lean implementation can produce.

Bit-Width Analysis for General Applications

It has been widely known that a significant part of the bits are useless or even unused during the program execution. Bit-width analysis targets at finding the minimum bits needed for each variable in the program, which ensures the execution correctness and resources saving. In this paper, we proposed a static analysis method for bit-widths in general applications, which approximates conservatively at compile time and is independent of runtime conditions. While most related work focus on integer applications, our method is also tailored and applicable to floating point variables, which could be extended to transform floating point number into fixed point numbers together with precision analysis. We used more precise representations for data value ranges of both scalar and array variables. Element level analysis is carried out for arrays. We also suggested an alternative for the standard fixed-point iterations in bi-directional range analysis. These techniques are implemented on the Trimaran compiler structure and tested on a set of benchmarks to show the results.

Exploring Bit-Difference for Approximate KNN Search in High-dimensional Databases

In this paper, we develop a novel index structure to support efficient approximate k-nearest neighbor (KNN) query in high-dimensional databases. In high-dimensional spaces, the computational cost of the distance (e.g., Euclidean distance) between two points contributes a dominant portion of the overall query response time for memory processing. To reduce the distance computation, we first propose a structure (BID) using BIt-Difference to answer approximate KNN query. The BID employs one bit to represent each feature vector of point and the number of bit-difference is used to prune the further points. To facilitate real dataset which is typically skewed, we enhance the BID mechanism with clustering, cluster adapted bitcoder and dimensional weight, named the BID⁺. Extensive experiments are conducted to show that our proposed method yields significant performance advantages over the existing index structures on both real life and synthetic high-dimensional datasets.

Applying the Lessons of “Lean Now” to Transform the US Aerospace Enterprise

Lean is common sense and good business sense. As organizations grow and become more successful, they begin to lose insight into the basic truths of what made them successful. Organizations have to deal with more and more issues that may not have anything to do with directly providing products or services to their customers. Lean is a holistic management approach that brings the focus of the organization back to providing value to the customer. In August 2002, Mrs. Darleen Druyun, the Principal Deputy to the Assistant Secretary of the Air Force for Acquisition and government co-chairperson of the Lean Aerospace Initiative (LAI), decided it was time for Air Force acquisitions to embrace the concepts of lean. At her request, the LAI Executive Board developed a concept and methodology to employ lean into the Air Force’s acquisition culture and processes. This was the birth of the “Lean Now” initiative. An enterprise-wide approach was used, involving Air Force System Program Offices (SPOs), aerospace industry, and several Department of Defense agencies. The aim of Lean Now was to focus on the process interfaces between these “enterprise” stakeholders to eliminate barriers that impede progress. Any best practices developed would be institutionalized throughout the Air Force and the Department of Defense (DoD). The industry members of LAI agreed to help accelerate the government-industry transformation by donating lean Subject Matter Experts (SMEs) to mentor, train, and facilitate the lean events of each enterprise. Currently, the industry SMEs and the Massachusetts Institute of Technology are working together to help the Air Force develop its own lean infrastructure of training courses and Air Force lean SMEs. The first Lean Now programs were the F/A-22, Global Hawk, and F-16. Each program focused on specific acquisition processes. The F/A-22 focused on the Test and Evaluation process; the Global Hawk focused on Evolutionary Acquisitions; and the F-16 focused on improving the Contract Closeout process. Through lean, each enterprise made many significant improvements. The F/A-22 was able to reduce its Operational Flight Plan (OFP) Preparation and Load process time of 2 to 3 months down to 7 hours. The Global Hawk developed a new production plan that increases the annual production of its Integrated Sensor Suite from 3 per year to 6 per year. The F-16 enterprise generated and is working 12 initiatives that could result in a contract closeout cycle time reduction of 3 to 7 years. Each enterprise continues to generate more lean initiatives that focus on other areas and processes within their respective enterprises.

China Marches West: Jacket cover

The China we know today is the product of vast frontier conquests of the seventeenth and eighteenth centuries by the expanding Qing empire. China Marches West tells the story of this unprecedented expansion and explores its consequences for the modern Chinese nation.

China Marches West: Character List

Character list of Chinese terms in book China Marches West.

Managing A Changing Relationship: China's Japan Policy in the 1990s

This paper was prepared for the conference on "China into the twenty-first century: Strategic partner and...or peer competitor"