Two-dimensional Photonic Crystals Fabricated by Nanoimprint Lithography

We report on the process parameters of nanoimprint lithography (NIL) for the fabrication of two-dimensional (2-D) photonic crystals. The nickel mould with 2-D photonic crystal patterns covering the area up to 20mm² is produced by electron-beam lithography (EBL) and electroplating. Periodic pillars as high as 200nm to 250nm are produced on the mould with the diameters ranging from 180nm to 400nm. The mould is employed for nanoimprinting on the poly-methyl-methacrylate (PMMA) layer spin-coated on the silicon substrate. Periodic air holes are formed in PMMA above its glass-transition temperature and the patterns on the mould are well transferred. This nanometer-size structure provided by NIL is subjective to further pattern transfer.

Thread Scheduling Mechanisms for Multiple-Context Parallel Processors

Scheduling tasks to efficiently use the available processor resources is crucial to minimizing the runtime of applications on shared-memory parallel processors. One factor that contributes to poor processor utilization is the idle time caused by long latency operations, such as remote memory references or processor synchronization operations. One way of tolerating this latency is to use a processor with multiple hardware contexts that can rapidly switch to executing another thread of computation whenever a long latency operation occurs, thus increasing processor utilization by overlapping computation with communication. Although multiple contexts are effective for tolerating latency, this effectiveness can be limited by memory and network bandwidth, by cache interference effects among the multiple contexts, and by critical tasks sharing processor resources with less critical tasks. This thesis presents techniques that increase the effectiveness of multiple contexts by intelligently scheduling threads to make more efficient use of processor pipeline, bandwidth, and cache resources. This thesis proposes thread prioritization as a fundamental mechanism for directing the thread schedule on a multiple-context processor. A priority is assigned to each thread either statically or dynamically and is used by the thread scheduler to decide which threads to load in the contexts, and to decide which context to switch to on a context switch. We develop a multiple-context model that integrates both cache and network effects, and shows how thread prioritization can both maintain high processor utilization, and limit increases in critical path runtime caused by multithreading. The model also shows that in order to be effective in bandwidth limited applications, thread prioritization must be extended to prioritize memory requests. We show how simple hardware can prioritize the running of threads in the multiple contexts, and the issuing of requests to both the local memory and the network. Simulation experiments show how thread prioritization is used in a variety of applications. Thread prioritization can improve the performance of synchronization primitives by minimizing the number of processor cycles wasted in spinning and devoting more cycles to critical threads. Thread prioritization can be used in combination with other techniques to improve cache performance and minimize cache interference between different working sets in the cache. For applications that are critical path limited, thread prioritization can improve performance by allowing processor resources to be devoted preferentially to critical threads. These experimental results show that thread prioritization is a mechanism that can be used to implement a wide range of scheduling policies.

Defects in Self Assembled Colloidal Crystals

Colloidal self assembly is an efficient method for making 3-D ordered nanostructures suitable for materials such as photonic crystals and macroscopic solids for catalysis and sensor applications. Colloidal crystals grown by convective methods exhibit defects on two different scales. Macro defects such as cracks and void bands originate from the dynamics of meniscus motion during colloidal crystal growth while micro defects like vacancies, dislocation and stacking faults are indigenous to the colloidal crystalline structure. This paper analyses the crystallography and energetics of the microscopic defects from the point of view of classical thermodynamics and discusses the strategy for the control of the macroscopic defects through optimization of the liquid-vapor interface.

Process Variability in Micro-Embossing

A promising technique for the large-scale manufacture of micro-fluidic devices and photonic devices is hot embossing of polymers such as PMMA. Micro-embossing is a deformation process where the workpiece material is heated to permit easier material flow and then forced over a planar patterned tool. While there has been considerable, attention paid to process feasibility very little effort has been put into production issues such as process capability and eventual process control. In this paper, we present initial studies aimed at identifying the origins and magnitude of variability for embossing features at the micron scale in PMMA. Test parts with features ranging from 3.5- 630 µm wide and 0.9 µm deep were formed. Measurements at this scale proved very difficult, and only atomic force microscopy was able to provide resolution sufficient to identify process variations. It was found that standard deviations of widths at the 3-4 µm scale were on the order of 0.5 µm leading to a coefficient of variation as high as 13%. Clearly, the transition from test to manufacturing for this process will require understanding the causes of this variation and devising control methods to minimize its magnitude over all types of parts.