2 resultados para Critical Film Thickness

em Massachusetts Institute of Technology


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A lubrication-flow model for a free film in a corner is presented. The model, written in the hyperbolic coordinate system ξ = x² – y², η = 2xy, applies to films that are thin in the η direction. The lubrication approximation yields two coupled evolution equations for the film thickness and the velocity field which, to lowest order, describes plug flow in the hyperbolic coordinates. A free film in a corner evolving under surface tension and gravity is investigated. The rate of thinning of a free film is compared to that of a film evolving over a solid substrate. Viscous shear and normal stresses are both captured in the model and are computed for the entire flow domain. It is shown that normal stress dominates over shear stress in the far field, while shear stress dominates close to the corner.

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Scaling down of the CMOS technology requires thinner gate dielectric to maintain high performance. However, due to the depletion of poly-Si gate, it is difficult to reduce the gate thickness further especially for sub-65 nm CMOS generation. Fully silicidation metal gate (FUSI) is one of the most promising solutions. Furthermore, FUSI metal gate reduces gate-line sheet resistance, prevents boron penetration to channels, and has good process compatibility with high-k gate dielectric. Poly-SiGe gate technology is another solution because of its enhancement of boron activation and compatibility with the conventional CMOS process. Combination of these two technologies for the formation of fully germanosilicided metal gate makes the approach very attractive. In this paper, the deposition of undoped Poly-Si₁₋xGex (0 < x < 30% ) films onto SiO₂ in a low pressure chemical vapor deposition (LPCVD) system is described. Detailed growth conditions and the characterization of the grown films are presented.