Utility pole accident countermeasures evaluation program and input processor - user's manual.

Federal Highway Administration, Office of Implementation, McLean, Va.

Emulation of disc file processor /

"June, 1971."

Hybrid circuit design for the artrix graphical processor.

Bibliography: p. 47.

Illiac III computer system manual: taxicrinic processor,

At head of title: COO-2118-0001.

System and circuit design of the transformatrix coefficient processor and output data channel,

Vita.

Memory search algorithms for an iterative processor.

Includes bibliographical references.

Simulation of a tree processor /

Thesis (M. S.)--University of Illinois at Urbana-Champaign.

Emulation of the PDP-11 instruction set on the Lockheed SUE processor /

Thesis (M.S.)--University of Illinois at Urbana-Champaign.

Scheduling periodic-time-critical jobs on single processor and multiprocessor computing systems /

Vita.

System design for artrix graphical processor.

Mode of access: Internet.

NUCLEOL, a minimal list processor,

Paper presented at the Purdue Centennial Year Symposium on Information Processing, April 28, 1969.

A list merging processor for inverted file information retrieval systems /

Originally presented as the author's thesis, University of Illinois at Urbana-Champaign.

Illiac III computer system manual : taxicrinic processor, volume 2 /

"This work was supported by Contract AT(11-1)-1018 with the U.S. Atomic Energy Commission through September 30, 1970. Current support is under Contract AV(11-1)-2118 with the above agency."

Illiac III: a processor of visual information,

On cover: C00-1018-1057.

Memory-processor connection networks.

Vita.