HPC Accelerators with 3D Memory
Data(s) |
13/09/2016
13/09/2016
2016
13/09/2016
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Resumo |
After a decade evolving in the High Performance Computing arena, GPU-equipped supercomputers have con- quered the top500 and green500 lists, providing us unprecedented levels of computational power and memory bandwidth. This year, major vendors have introduced new accelerators based on 3D memory, like Xeon Phi Knights Landing by Intel and Pascal architecture by Nvidia. This paper reviews hardware features of those new HPC accelerators and unveils potential performance for scientific applications, with an emphasis on Hybrid Memory Cube (HMC) and High Bandwidth Memory (HBM) used by commercial products according to roadmaps already announced. Artículo invitado, publicado en las actas del congreso por IEEE Society Press. Páginas 320 a 328. ISBN: 978-1-5090-3593-9.DOI 10.1109/CSE-EUC-DCABES-2016.203 Universidad de Málaga. Campus de Excelencia Internacional Andalucia Tech |
Identificador | |
Idioma(s) |
eng |
Relação |
19th IEEE International Conference on Computational Science and Engineering (CSE'16) París (Francia) 24 Agosto de 2016 |
Direitos |
info:eu-repo/semantics/openAccess |
Palavras-Chave | #Superordenadores #CUDA #GPU #HPC #Memoria 3D |
Tipo |
info:eu-repo/semantics/preprint info:eu-repo/semantics/conferenceObject |