Injecting multiple upsets a SEU tolerant 8051 micro-controller


Autoria(s): Carro, L.; Reis, R.; Velazco, R.
Contribuinte(s)

DELET ; Universidade Federal do Rio Grande do Sul [Porto Alegre] (UFRGS)

ASME ; ASME

Cobertura

Ile de Bendor, France

Data(s)

08/07/2002

Resumo

International audience

This paper investigates the behavior of a SEU tolerant 8051-like micro-controller protected by single error correction Hamming Code in the presence of multiple upsets. Upsets were randomly injected in all sensitive parts of the design. The experiment was emulated in a Virtex FPGA platform. Results evaluate the robustness of the tolerant 8051 in a multiple upsets environment.

Identificador

hal-01392537

https://hal.archives-ouvertes.fr/hal-01392537

Idioma(s)

fr

Publicador

HAL CCSD

IEEE

Direitos

http://creativecommons.org/licenses/by-nc/

Fonte

8th IEEE International On-Line Testing Workshop (IOLT'02)

https://hal.archives-ouvertes.fr/hal-01392537

8th IEEE International On-Line Testing Workshop (IOLT'02), Jul 2002, Ile de Bendor, France. IEEE, Proceedings

Palavras-Chave #PACS 8542 #[SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Tipo

info:eu-repo/semantics/conferenceObject

Conference papers