Quasi delay insensitive asynchronous circuits for low EMI


Autoria(s): Bouesse, G.F.; Sicard, G.; Baixas, A.; Renaudin, M.
Contribuinte(s)

Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF) - Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP) - Institut National Polytechnique de Grenoble (INPG) - Centre National de la Recherche Scientifique (CNRS) - Université Grenoble Alpes (UGA)

Cobertura

Angers, France

Data(s)

31/03/2004

Resumo

International audience

This paper presents a new design alternative for controlling/reducing electromagnetic emissions of integrated circuits. Our design approach is based on the exploitation of Quasi Delay Insensitive Asynchronous logic properties. In fact, by using a four-phase protocol combined with 1-of-N encoded data, we demonstrate how QDI circuits can be used for tuning and lowering electromagnetic emissions. The investigation is based on the characterisation of two DES crypto-processors an asynchronous and a synchronous version. The spectrum of the measured currents shows a significant reduction of the EMI of the asynchronous DES when compared to the synchronous one.

Identificador

hal-01392544

https://hal.archives-ouvertes.fr/hal-01392544

Idioma(s)

fr

Publicador

HAL CCSD

Direitos

http://creativecommons.org/licenses/by-nc/

Fonte

4th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo'04)

https://hal.archives-ouvertes.fr/hal-01392544

4th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo'04), Mar 2004, Angers, France

Palavras-Chave #asynchronous circuits and systems #PACS 8542 #[SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Tipo

info:eu-repo/semantics/conferenceObject

Conference papers