Optimisation of digitally coded test vectors for mixed-signal components

International audience

This article proposes a technique to optimize test patterns targeting Analogue and Mixed-Signal (AMS) cores in System-On-Chip (SoC) devices. In order to render the test of these cores compatible with the test of digital ones and with the use of low-cost testers, the analogue test patterns are digitally coded. They can then be scanned into the chip where they are easily converted into the required analogue test patterns. A Computer-Aided Test (CAT) tool is used to optimize the digital coding of the desired analogue test signal. Several multiobjective optimization algorithms are considered to carry out this task, including Monte-Carlo, W.A.R.G.A (Weighted Average Ranking Genetic Algorithm) and N.S.G.A (Nondominated Sorting Genetic Algorithm). The results obtained with these different algorithms are illustrated for different analogue test signals.