Asynchronus design for improved EMC behavior of ICs
| Contribuinte(s) |
Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF) - Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP) - Institut National Polytechnique de Grenoble (INPG) - Centre National de la Recherche Scientifique (CNRS) - Université Grenoble Alpes (UGA) |
|---|---|
| Cobertura |
Angers, France |
| Data(s) |
31/03/2004
|
| Resumo |
International audience The aim of the presented method is to obtain asynchronous circuits from Register Transfer Level description of synchronous ones. This method suggests to replace identified synchronous structures by equivalent asynchronous ones. The technique permits to exploit low electromagnetic emission benefits of asynchronous circuits. Applying this method on a 4 coefficient Finite Impulse Response Filter has significantly reduced current peak magnitude. |
| Identificador |
hal-01392585 |
| Idioma(s) |
fr |
| Publicador |
HAL CCSD |
| Direitos |
http://creativecommons.org/licenses/by-nc/ |
| Fonte |
4th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo'04) https://hal.archives-ouvertes.fr/hal-01392585 4th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC Compo'04), Mar 2004, Angers, France |
| Palavras-Chave | #asynchronous circuits and systems #PACS 8542 #[SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics |
| Tipo |
info:eu-repo/semantics/conferenceObject Conference papers |
