An FPGA architecture for improved arithmetic performance

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Autoria(s): Rajagopalan, Kamal.

Data(s)	01/01/2001
Identificador	http://espace.library.uq.edu.au/view/UQ:105928
Idioma(s)	eng
Publicador	The University of Queensland, School of Computer Science and Electrical Engineering
Palavras-Chave	#Programmable array logic #Field programmable gate arrays #L #291601 Arithmetic and Logic Structures #671201 Integrated circuits and devices
Tipo	Thesis