A reconfigurable cluster-on-chip architecture with MPI communication layer

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Autoria(s): Williams, J A; Azeezullah, S I; Wu, J.; Bergmann, N W

Contribuinte(s)	K. Pocek D. Buell
Data(s)	01/01/2006
Identificador	http://espace.library.uq.edu.au/view/UQ:104446
Publicador	IEEE
Palavras-Chave	#E1 #291601 Arithmetic and Logic Structures #671202 Modules-special and attached processors
Tipo	Conference Paper