A simple mechanism to deal with sequential code in dataflow architectures


Autoria(s): Cavenaghi, Marcos Antônio; Travieso, G.; Neto, A. G.; IEEE COMP SOC
Contribuinte(s)

Universidade Estadual Paulista (UNESP)

Data(s)

20/05/2014

20/05/2014

01/01/1998

Resumo

The aim of this work is to propose a simple and efficient mechanism to deal with the problem of executing sequential code in a pure dataflow machine. Our results is obtained with a simulator of Wolf [4] architecture. The implemented mechanism improved the architecture performance when executing sequential code and we expect that this improvement could be better if we use some heuristics to deal with some special groups of instructions such as branch operations. Further research will show us if this is true.

Formato

188-193

Identificador

http://dx.doi.org/10.1109/HIPC.1998.737988

Fifth International Conference on High Performance Computing, Proceedings. Los Alamitos: IEEE Computer Soc, p. 188-193, 1998.

1094-7256

http://hdl.handle.net/11449/39618

10.1109/HIPC.1998.737988

WOS:000077521400025

Idioma(s)

eng

Publicador

Institute of Electrical and Electronics Engineers (IEEE), Computer Soc

Relação

Fifth International Conference on High Performance Computing, Proceedings

Direitos

closedAccess

Tipo

info:eu-repo/semantics/conferencePaper