Fat-Tree Routing for Transit


Autoria(s): DeHon, Andre
Data(s)

20/10/2004

20/10/2004

01/02/1990

Resumo

The Transit network provides high-speed, low-latency, fault-tolerant interconnect for high-performance, multiprocessor computers. The basic connection scheme for Transit uses bidelta style, multistage networks to support up to 256 processors. Scaling to larger machines by simply extending the bidelta network topology will result in a uniform degradation of network latency between all processors. By employing a fat-tree network structure in larger systems, the network provides locality and universality properties which can help minimize the impact of scaling on network latency. This report details the topology and construction issues associated with integrating Transit routing technology into fat-tree interconnect topologies.

Formato

4074548 bytes

3944868 bytes

application/postscript

application/pdf

Identificador

AITR-1224

http://hdl.handle.net/1721.1/7026

Idioma(s)

en_US

Relação

AITR-1224