A novel Sigma–Delta based parallel analogue-to-residue converter


Autoria(s): Poulose Jacob,K; Shahana, T K; Babita, Jose R; Sreela Sasi
Data(s)

15/07/2014

15/07/2014

01/05/2009

Resumo

Animportant step in the residue number system(RNS) based signal processing is the conversion of signal into residue domain. Many implementations of this conversion have been proposed for various goals, and one of the implementations is by a direct conversion from an analogue input. A novel approach for analogue-to-residue conversion is proposed in this research using the most popular Sigma–Delta analogue-to-digital converter (SD-ADC). In this approach, the front end is the same as in traditional SD-ADC that uses Sigma–Delta (SD) modulator with appropriate dynamic range, but the filtering is doneby a filter implemented usingRNSarithmetic. Hence, the natural output of the filter is an RNS representation of the input signal. The resolution, conversion speed, hardware complexity and cost of implementation of the proposed SD based analogue-to-residue converter are compared with the existing analogue-to-residue converters based on Nyquist rate ADCs

International Journal of Electronics Vol. 96, No. 6, June 2009, 571–583

Cochin University of Science and Technology

Identificador

0020-7217 print/ISSN 1362-3060 online

http://dyuthi.cusat.ac.in/purl/4020

Idioma(s)

en

Publicador

Taylor & Francis

Palavras-Chave #analogue-to-residue converter #Sigma–Delta modulator #decimation filter #residue number system #performance evaluation
Tipo

Article