A tighter analysis of the worst-case endto- end communication delay in massive multicores
| Data(s) |
07/02/2014
07/02/2014
2011
|
|---|---|
| Resumo |
"Many-core” systems based on the Network-on- Chip (NoC) architecture have brought into the fore-front various opportunities and challenges for the deployment of real-time systems. Such real-time systems need timing guarantees to be fulfilled. Therefore, calculating upper-bounds on the end-to-end communication delay between system components is of primary interest. In this work, we identify the limitations of an existing approach proposed by [1] and propose different techniques to overcome these limitations. |
| Identificador | |
| Idioma(s) |
eng |
| Publicador |
IPP-Hurray Group |
| Relação |
http://www.cister.isep.ipp.pt/docs/ |
| Direitos |
openAccess |
| Tipo |
report |