A unique and robust single slice FPGA identification generator
| Data(s) |
01/06/2014
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| Resumo |
In this paper, a new field-programmable gate array (FPGA) identification generator circuit is introduced based on physically unclonable function (PUF) technology. The new identification generator is able to convert flip-flop delay path variations to unique n-bit digital identifiers (IDs), while requiring only a single slice per ID bit by using 1-bit ID cells formed as hard-macros. An exemplary 128-bit identification generator is implemented on ten Xilinx Spartan-6 FPGA devices. Experimental results show an uniqueness of 48.52%, and reliability of 92.41% over a 25°C to 70°C temperature range and 10% fluctuation in supply voltage |
| Identificador | |
| Idioma(s) |
eng |
| Publicador |
Institute of Electrical and Electronics Engineers (IEEE) |
| Direitos |
info:eu-repo/semantics/restrictedAccess |
| Fonte |
Gu , C , Murphy , J & O'Neill , M 2014 , A unique and robust single slice FPGA identification generator . in Circuits and Systems (ISCAS), 2014 IEEE International Symposium on . Institute of Electrical and Electronics Engineers (IEEE) , pp. 1223-1226 , IEEE International Symposium on Circuits and Systems , Melbourne , Australia , 1-7 June . DOI: 10.1109/ISCAS.2014.6865362 |
| Tipo |
contributionToPeriodical |
