THE DESIGN OF A VLSI ARRAY PROCESSOR CHIP FOR COMPUTING THE BASIC ARITHMETIC OPERATIONS
Contribuinte(s) |
Yao, K Jain, R Przytula, W Rabaey, J |
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Data(s) |
1992
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Identificador | |
Idioma(s) |
eng |
Publicador |
Ashgate Publishing |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
MCQUILLAN , S E , MCCANNY , J V , WOODS , R F & DOWLING , J 1992 , THE DESIGN OF A VLSI ARRAY PROCESSOR CHIP FOR COMPUTING THE BASIC ARITHMETIC OPERATIONS . in K Yao , R Jain , W Przytula & J Rabaey (eds) , VLSI SIGNAL PROCESSING, V . Ashgate Publishing , NEW YORK , pp. 61-70 , 6TH BIENNIAL WORKSHOP ON VLSI SIGNAL PROCESSING , NAPA , United States , 28-30 October . |
Tipo |
contributionToPeriodical |