DESIGN OF A HIGHLY PIPELINED 2ND-ORDER IIR FILTER CHIP

Autoria(s): MCNALLY, OC; MCCANNY, JV; WOODS, RF
Contribuinte(s)

Halaas, A

Denyer, PB
Data(s)

1992
Identificador

http://pure.qub.ac.uk/portal/en/publications/design-of-a-highly-pipelined-2ndorder-iir-filter-chip(40b1ac7e-57a4-49a8-879c-a6226156c5d8).html
Idioma(s)

eng
Publicador

ELSEVIER SCIENCE PUBL B V
Direitos

info:eu-repo/semantics/restrictedAccess
Fonte

MCNALLY , O C , MCCANNY , J V & WOODS , R F 1992 , DESIGN OF A HIGHLY PIPELINED 2ND-ORDER IIR FILTER CHIP . in A Halaas & P B Denyer (eds) , VLSI 91 . IFIP TRANSACTIONS A-COMPUTER SCIENCE AND TECHNOLOGY , vol. 1 , ELSEVIER SCIENCE PUBL B V , AMSTERDAM , pp. 19-28 , IFIP TC10/WG10.5 International Conference on Very Large Scale Integration , EDINBURGH , United Kingdom , 20-22 August .
Tipo

contributionToPeriodical
Acesso ao item digital