Containing the Nanometer "Pandora-Box": Cross-Layer Design Techniques for Variation Aware Low Power Systems


Autoria(s): Karakonstantis, Georgios; Chatterjee, Abhijit; Roy, Kaushik
Data(s)

01/03/2011

Resumo

<p>The demand for richer multimedia services, multifunctional portable devices and high data rates can only been visioned due to the improvement in semiconductor technology. Unfortunately, sub-90 nm process nodes uncover the nanometer Pandora-box exposing the barriers of technology scaling-parameter variations, that threaten the correct operation of circuits, and increased energy consumption, that limits the operational lifetime of today's systems. The contradictory design requirements for low-power and system robustness, is one of the most challenging design problems of today. The design efforts are further complicated due to the heterogeneous types of designs ( logic, memory, mixed-signal) that are included in today's complex systems and are characterized by different design requirements. This paper presents an overview of techniques at various levels of design abstraction that lead to low power and variation aware logic, memory and mixed-signal circuits and can potentially assist in meeting the strict power budgets and yield/quality requirements of future systems.</p>

Identificador

http://pure.qub.ac.uk/portal/en/publications/containing-the-nanometer-pandorabox-crosslayer-design-techniques-for-variation-aware-low-power-systems(805f92f5-d5f7-43fd-a036-369a0e407de2).html

http://dx.doi.org/10.1109/JETCAS.2011.2135590

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

Karakonstantis , G , Chatterjee , A & Roy , K 2011 , ' Containing the Nanometer "Pandora-Box": Cross-Layer Design Techniques for Variation Aware Low Power Systems ' IEEE Journal on Emerging and Selected Topics in Circuits and Systems , vol 1 , no. 1 , pp. 19-29 . DOI: 10.1109/JETCAS.2011.2135590

Palavras-Chave #Logic #low power #memory #mixed-signal design #variation tolerant design #voltage scaling
Tipo

article