Reconfigurable Architectures for Network Processing


Autoria(s): Sezer, Sakir; McLoone, Maire; McCanny, John
Data(s)

01/04/2005

Resumo

An overview of research on reconfigurable architectures for network processing applications within the Institute of Electronics, Communications and Information Technology (ECIT) is presented. Three key network processing topics, namely node throughput, Quality of Service (QoS) and security are examined where custom reconfigurability allows network nodes to adapt to fluctuating network traffic and customer demands. Various architectural possibilities have been investigated in order to explore the options and tradeoffs available when using reconfigurability for packet/frame processing, packet-scheduling and data encryption/decryption. This research has shown there is no common approach that can be applied. Rather the methodologies used and the cost-benefits for incorporation of reconfigurability depend on each of the functions considered, for example being well suited to encryption/decryption but not packet/frame processing. © 2005 IEEE.

Identificador

http://pure.qub.ac.uk/portal/en/publications/reconfigurable-architectures-for-network-processing(826526f3-d2a6-4c06-b131-e9bd9619597c).html

http://dx.doi.org/10.1109/VDAT.2005.1500024

http://www.scopus.com/inward/record.url?partnerID=yv4JPVwI&eid=2-s2.0-33745458155&md5=c26ff974c17ce5d8dd317f8e62002f9b

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

Sezer , S , McLoone , M & McCanny , J 2005 , Reconfigurable Architectures for Network Processing . in 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT) . vol. 2005 , pp. 75-83 , IEEE International Symposium on VLSI Technology Systems and Applications (VLSI-TSA) , Taiwan , Taiwan, Province of China , 1-1 April . DOI: 10.1109/VDAT.2005.1500024

Palavras-Chave #/dk/atira/pure/subjectarea/asjc/2200 #Engineering(all)
Tipo

contributionToPeriodical