Hardware elliptic curve cryptographic processor over GF(p)


Autoria(s): McIvor, C.J.; McLoone, M.; McCanny, J.V.
Data(s)

01/09/2006

Resumo

A novel hardware architecture for elliptic curve cryptography (ECC) over GF(p) is introduced. This can perform the main prime field arithmetic functions needed in these cryptosystems including modular inversion and multiplication. This is based on a new unified modular inversion algorithm that offers considerable improvement over previous ECC techniques that use Fermat's Little Theorem for this operation. The processor described uses a full-word multiplier which requires much fewer clock cycles than previous methods, while still maintaining a competitive critical path delay. The benefits of the approach have been demonstrated by utilizing these techniques to create a field-programmable gate array (FPGA) design. This can perform a 256-bit prime field scalar point multiplication in 3.86 ms, the fastest FPGA time reported to date. The ECC architecture described can also perform four different types of modular inversion, making it suitable for use in many different ECC applications. © 2006 IEEE.

Identificador

http://pure.qub.ac.uk/portal/en/publications/hardware-elliptic-curve-cryptographic-processor-over-gfp(0678965f-d621-43c3-8755-1f8e2fefdb1d).html

http://dx.doi.org/10.1109/TCSI.2006.880184

http://www.scopus.com/inward/record.url?partnerID=yv4JPVwI&eid=2-s2.0-33749376484&md5=75509a6c8c57d72177dc7d6ad27258fb

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

McIvor , C J , McLoone , M & McCanny , J V 2006 , ' Hardware elliptic curve cryptographic processor over GF(p) ' IEEE Transactions on Circuits and Systems I: Regular Papers , vol 53 , no. 9 , pp. 1946-1957 . DOI: 10.1109/TCSI.2006.880184

Palavras-Chave #/dk/atira/pure/subjectarea/asjc/2200/2208 #Electrical and Electronic Engineering
Tipo

article