Automated design of DSP array processor chips


Autoria(s): McCanny, J.V.; Hu, Yi; Yan, M.
Data(s)

01/01/1994

Resumo

Details are presented of the DAC (DSP ASIC Compiler) silicon compiler framework. DAC allows a non-specialist to automatically design DSP ASICs and DSP ASIC cores directly form a high level specification. Typical designs take only several minutes and the resulting layouts are comparable in area and performance to handcrafted designs.

Identificador

http://pure.qub.ac.uk/portal/en/publications/automated-design-of-dsp-array-processor-chips(5269920a-be69-4f81-9613-8e0ddbd89513).html

http://www.scopus.com/inward/record.url?partnerID=yv4JPVwI&eid=2-s2.0-0028564044&md5=8b8b3b010c7e009594e769faeb647508

Idioma(s)

eng

Direitos

info:eu-repo/semantics/restrictedAccess

Fonte

McCanny , J V , Hu , Y & Yan , M 1994 , ' Automated design of DSP array processor chips ' Proceedings of the International Conference on Application Specific Array Processors , pp. 33-44 .

Tipo

article