Designing computer architecture research workloads
| Data(s) |
01/02/2003
|
|---|---|
| Resumo |
MinneSPEC proposes reduced input sets that microprocessor designers can use to model representative short-running workloads. A four-step methodology verifies the program behavior similarity of these input sets to reference sets. |
| Identificador | |
| Idioma(s) |
eng |
| Direitos |
info:eu-repo/semantics/restrictedAccess |
| Fonte |
Eeckhout , L , Vandierendonck , H & De Bosschere , K 2003 , ' Designing computer architecture research workloads ' Computer , vol 36 , no. 2 , pp. 65 . |
| Palavras-Chave | #/dk/atira/pure/subjectarea/asjc/1700/1704 #Computer Graphics and Computer-Aided Design #/dk/atira/pure/subjectarea/asjc/1700/1708 #Hardware and Architecture #/dk/atira/pure/subjectarea/asjc/1700/1712 #Software |
| Tipo |
article |
