FPGA-based System-level design framework based on the IRIS synthesis tool and System Generator
| Data(s) |
01/12/2002
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|---|---|
| Identificador | |
| Idioma(s) |
eng |
| Direitos |
info:eu-repo/semantics/restrictedAccess |
| Fonte |
Yi , Y & Woods , R 2002 , ' FPGA-based System-level design framework based on the IRIS synthesis tool and System Generator ' Paper presented at IEEE International Conference on Field-Programmable Technology (FPT) , New Territories , China , 01/12/2002 - 01/12/2002 , pp. 85-92 . |
| Tipo |
conferenceObject |