CORDIC based application-specific instruction set processor for QRD/SVD
Data(s) |
01/11/2003
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Identificador | |
Idioma(s) |
eng |
Direitos |
info:eu-repo/semantics/restrictedAccess |
Fonte |
Liu , Z H , Dickson , K & McCanny , J 2003 , ' CORDIC based application-specific instruction set processor for QRD/SVD ' Conference Record of the Asilomar Conference on Signals, Systems and Computers , vol 2 , pp. 1456-1460 . |
Tipo |
article |
Resumo |
An application specific programmable processor (ASIP) suitable for the real-time implementation of matrix computations such as Singular Value and QR Decomposition is presented. The processor incorporates facilities for the issue of parallel instructions and a dual-bus architecture that are designed to achieve high performance. Internally, it uses a CORDIC module to perform arithmetic operations, with pipelining of the internal recursive loop exploited to multiplex the two independent micro-rotations onto a single piece of hardware. The net result is a flexible processing element whose functionality can be changed under program control, which combines high performance with efficient silicon implementation. This is illustrated through the results of a detailed silicon design study and the applications of the techniques to a combined SVD/QRD system. |
Palavras-Chave | #/dk/atira/pure/subjectarea/asjc/1700/1708 #Hardware and Architecture #/dk/atira/pure/subjectarea/asjc/1700/1711 #Signal Processing #/dk/atira/pure/subjectarea/asjc/2200/2208 #Electrical and Electronic Engineering |