The design and verification of FPGA CAD toolset
| Data(s) |
2007
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|---|---|
| Resumo |
This paper introduces a complete CAD toolset for the implementation of digital logic in a Field-Programmable Gate Array (FPGA) platform. Compared with existing academic toolsets, this toolset introduces formal verification in each step of the tool flow, especially the formal verification of the configuration bitstream. The FPGA CAD tool verification flow using Formality is presented in detail. Using plug-in technology, we have developed an integrated FPGA design kit to incorporate all tools together. This paper introduces a complete CAD toolset for the implementation of digital logic in a Field-Programmable Gate Array (FPGA) platform. Compared with existing academic toolsets, this toolset introduces formal verification in each step of the tool flow, especially the formal verification of the configuration bitstream. The FPGA CAD tool verification flow using Formality is presented in detail. Using plug-in technology, we have developed an integrated FPGA design kit to incorporate all tools together. zhangdi于2010-03-09批量导入 zhangdi于2010-03-09批量导入 [Zhou, Huabing; Ni, Minghao; Chen, Stanley; Liu, Zhongli] Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China |
| Identificador | |
| Idioma(s) |
英语 |
| Publicador |
IEEE 345 E 47TH ST, NEW YORK, NY 10017 USA |
| Fonte |
Zhou, HB ; Ni, MH ; Chen, S ; Liu, ZL .The design and verification of FPGA CAD toolset .见：IEEE .2007 INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS,345 E 47TH ST, NEW YORK, NY 10017 USA ,2007,VOLS 1 AND 2: 461-464 |
| Palavras-Chave | #微电子学 |
| Tipo |
会议论文 |
