基于部分局部互连结构的FPGA逻辑块
| Data(s) |
29/10/2008
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| Resumo |
Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-06-04T08:36:34Z No. of bitstreams: 1 dspace.cfg: 33388 bytes, checksum: ac9630d3fdb36a155287a049e8b34eb7 (MD5) Made available in DSpace on 2009-06-04T08:36:35Z (GMT). No. of bitstreams: 1 dspace.cfg: 33388 bytes, checksum: ac9630d3fdb36a155287a049e8b34eb7 (MD5) Previous issue date: 2008-08 Made available in DSpace on 2009-06-11T08:58:30Z (GMT). No. of bitstreams: 1 full/CN200710098701.3.pdf: 655938 bytes, checksum: 2f2c66f82b78ae46e89aac3d61c80f2f (MD5) Previous issue date: |
| Identificador | |
| Idioma(s) |
中文 |
| Fonte |
周华兵;倪明浩;陈陵都;郑厚植,基于部分局部互连结构的FPGA逻辑块,CN200710098701.3,20070425 |
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专利 |
