Row-buffer reorganization: simultaneously improving performance and reducing energy in DRAMs
Data(s) |
2011
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Resumo |
In this paper, based on the temporal and spatial locality characteristics of memory accesses in multicores, we propose a re-organization of the existing single large row buffer in a DRAM bank into multiple smaller row-buffers. The proposed configuration helps improve the row hit rates and also brings down the energy required for row-activations. The major contribution of this work is proposing such a reorganization without requiring any significant changes to the existing widely accepted DRAM specifications. Our proposed reorganization improves performance by 35.8%, 14.5% and 21.6% in quad, eight and sixteen core workloads along with a 42%, 28% and 31% reduction in DRAM energy. Additionally, we introduce a Need Based Allocation scheme for buffer management that shows additional performance improvement. |
Formato |
application/pdf |
Identificador |
http://eprints.iisc.ernet.in/46028/1/Par_Arch_Com_Tech_189_2011.pdf Gulur, Nagendra and Manikantan, R and Govindarajan, Ramaswamy and Mehendale, Mahesh M (2011) Row-buffer reorganization: simultaneously improving performance and reducing energy in DRAMs. In: 2011 International Conference on Parallel Architectures and Compilation Techniques (PACT), 10-14 Oct. 2011, Galveston, TX. |
Publicador |
IEEE |
Relação |
http://dx.doi.org/10.1109/PACT.2011.34 http://eprints.iisc.ernet.in/46028/ |
Palavras-Chave | #Computer Science & Automation (Formerly, School of Automation) |
Tipo |
Conference Paper PeerReviewed |