A Parallel Progressive Refinement Image Rendering Algorithm on a Scalable Multithreaded VLSI Processor Array


Autoria(s): Nandy, SK; Narayanan, R; Visvanathan, V; Sadayappan, P; Chauhan, PS
Contribuinte(s)

Hariri, S

Berra , PB

Data(s)

1993

Resumo

In this paper we develop a multithreaded VLSI processor linear array architecture to render complex environments based on the radiosity approach. The processing elements are identical and multithreaded. They work in Single Program Multiple Data (SPMD) mode. A new algorithm to do the radiosity computations based on the progressive refinement approach[2] is proposed. Simulation results indicate that the architecture is latency tolerant and scalable. It is shown that a linear array of 128 uni-threaded processing elements sustains a throughput close to 0.4 million patches/sec.

Formato

application/pdf

Identificador

http://eprints.iisc.ernet.in/35321/1/Parallel.pdf

Nandy, SK and Narayanan, R and Visvanathan, V and Sadayappan, P and Chauhan, PS (1993) A Parallel Progressive Refinement Image Rendering Algorithm on a Scalable Multithreaded VLSI Processor Array. In: 1993 International Conference on Parallel Processing, AUG 16-20, 1993, SYRACUSE UNIV, SYRACUSE, NY,.

Publicador

IEEE

Relação

http://ieeexplore.ieee.org/search/srchabstract.jsp?tp=&arnumber=4134252&queryText%3DA+Parallel+Progressive+Refinement+Image+Rendering+Algorithm+on+a+Scalable+Multithreaded+VLSI+Processor+Array%26openedRefinements%3D*%26searchField%3DSearch+All

http://eprints.iisc.ernet.in/35321/

Palavras-Chave #Supercomputer Education & Research Centre
Tipo

Conference Paper

PeerReviewed