Minimising capacitive couplings and distributing copper losses in planar magnetic elements

Planar magnetic elements are becoming a replacement for their conventional rivals. Among the reasons supporting their application, is their smaller size. Taking less bulk in the electronic package is a critical advantage from the manufacturing point of view. The planar structure consists of the PCB copper tracks to generate the desired windings .The windings on each PCB layer could be connected in various ways to other winding layers to produce a series or parallel connection. These windings could be applied coreless or with a core depending on the application in Switched Mode Power Supplies (SMPS). Planar shapes of the tracks increase the effective conduction area in the windings, brings about more inductance compared to the conventional windings with the similar copper loss case. The problem arising from the planar structure of magnetic inductors is the leakage current between the layers generated by a pulse width modulated voltage across the inductor. This current value relies on the capacitive coupling between the layers, which in its turn depends on the physical parameters of the planar scheme. In order to reduce this electrical power dissipation due to the leakage current and Electromagnetic Interference (EMI), reconsideration in the planar structure might be effective. The aim of this research is to address problem of these capacitive coupling in planar layers and to find out a better structure for the planar inductance which offers less total capacitive coupling and thus less thermal dissipation from the leakage currents. Through Finite Element methods (FEM) several simulations have been carried out for various planar structures. The labs prototypes of these structures are built with the similar specification of the simulation cases. The capacitive couplings of the samples are determined with Spectrum Analyser whereby the test analysis verified the simulation results.