Magnetophoretic circuits for digital control of single particles and cells.

The ability to manipulate small fluid droplets, colloidal particles and single cells with the precision and parallelization of modern-day computer hardware has profound applications for biochemical detection, gene sequencing, chemical synthesis and highly parallel analysis of single cells. Drawing inspiration from general circuit theory and magnetic bubble technology, here we demonstrate a class of integrated circuits for executing sequential and parallel, timed operations on an ensemble of single particles and cells. The integrated circuits are constructed from lithographically defined, overlaid patterns of magnetic film and current lines. The magnetic patterns passively control particles similar to electrical conductors, diodes and capacitors. The current lines actively switch particles between different tracks similar to gated electrical transistors. When combined into arrays and driven by a rotating magnetic field clock, these integrated circuits have general multiplexing properties and enable the precise control of magnetizable objects.

Waveguide-to-microstrip transition at G-band using elevated E-plane probe

A rectangular waveguide-to-microstrip transition operating at G-band is presented. The E-plane probe, used in the transition, is fabricated on semi-insulating gallium arsenide (SI-GaAs) and it is elevated on the substrate. This configuration reduces interaction with semiconductor material. The elevated probe is suitable for direct integration with monolithic microwave integrated circuits. Measured results show S11 better than 210dB between 150 and 200 GHz and S21 ¼ 2 4dB at centre band (180GHz) for two transitions in back-to-back configuration.

Projecto de receptores integrados de banda larga

O presente trabalho tem como objectivo o estudo e projecto de receptores optimizados para sistemas de comunicações por fibra óptica de muito alto débito (10Gb/s e 40Gb/s), com a capacidade integrada de compensação adaptativa pós-detecção da distorção originada pela característica de dispersão cromática e de polarização do canal óptico. O capítulo 1 detalha o âmbito de aplicabilidade destes receptores em sistemas de comunicações ópticas com multiplexagem no comprimento de onda (WDM) actuais. O capítulo apresenta ainda os objectivos e principais contribuições desta tese. O capítulo 2 detalha o projecto de um amplificador pós-detecção adequado para sistemas de comunicação ópticos com taxa de transmissão de 10Gb/s. São discutidas as topologias mais adequadas para amplificadores pós detecção e apresentados os critérios que ditaram a escolha da topologia de transimpedância bem como as condições que permitem optimizar o seu desempenho em termos de largura de banda, ganho e ruído. Para além disso são abordados aspectos relacionados com a implementação física em tecnologia monolítica de microondas (MMIC), focando em particular o impacto destes no desempenho do circuito, como é o caso do efeito dos componentes extrínsecos ao circuito monolítico, em particular as ligações por fio condutor do monólito ao circuito externo. Este amplificador foi projectado e produzido em tecnologia pHEMT de Arsenieto de Gálio e implementado em tecnologia MMIC. O protótipo produzido foi caracterizado na fábrica, ainda na bolacha em que foi produzido (on-wafer) tendo sido obtidos dados de caracterização de 80 circuitos protótipo. Estes foram comparados com resultados de simulação e com desempenho do protótipo montado num veículo de teste. O capítulo 3 apresenta o projecto de dois compensadores eléctricos ajustáveis com a capacidade de mitigar os efeitos da dispersão cromática e da dispersão de polarização em sistemas ópticos com débito binário de 10Gb/s e 40Gb/s, com modulação em banda lateral dupla e banda lateral única. Duas topologias possíveis para este tipo de compensadores (a topologia Feed-Forward Equalizer e a topologia Decision Feedback Equaliser) são apresentadas e comparadas. A topologia Feed-Forward Equaliser que serviu de base para a implementação dos compensadores apresentados é analisada com mais detalhe sendo propostas alterações que permitem a sua implementação prática. O capítulo apresenta em detalhe a forma como estes compensadores foram implementados como circuitos distribuídos em tecnologia MMIC sendo propostas duas formas de implementar as células de ganho variável: com recurso à configuração cascode ou com recurso à configuração célula de Gilbert. São ainda apresentados resultados de simulação e experimentais (dos protótipos produzidos) que permitem tirar algumas conclusões sobre o desempenho das células de ganho com as duas configurações distintas. Por fim, o capítulo inclui ainda resultados de desempenho dos compensadores testados como compensadores de um sinal eléctrico afectado de distorção. No capítulo 4 é feita uma análise do impacto da modulação em banda lateral dupla (BLD) em comparação com a modulação em banda lateral única (BLU) num sistema óptico afectado de dispersão cromática e de polarização. Mostra-se que com modulação em BLU, como não há batimento entre portadoras das duas bandas laterais em consequência do processo quadrático de detecção e há preservação da informação da distorção cromática do canal (na fase do sinal), o uso deste tipo de modulação em sistemas de comunicação óptica permite maior tolerância à dispersão cromática e os compensadores eléctricos são muito mais eficientes. O capítulo apresenta ainda resultados de teste dos compensadores desenvolvidos em cenários experimentais de laboratório representativos de sistemas ópticos a 10Gb/s e 40Gb/s. Os resultados permitem comparar o desempenho destes cenários sem e com compensação eléctrica optimizada, para os casos de modulação em BLU e em BLD, e considerando ainda os efeitos da dispersão na velocidade de grupo e do atraso de grupo diferencial. Mostra-se que a modulação BLU em conjunto com compensação adaptativa eléctrica permite um desempenho muito superior á modulação em BLD largamente utilizada nos sistemas de comunicações actuais. Por fim o capítulo 5 sintetiza e apresenta as principais conclusões deste trabalho.

Automatic layout generation of static CMOS circuits targeting delay and power

The evolution of integrated circuits technologies demands the development of new CAD tools. The traditional development of digital circuits at physical level is based in library of cells. These libraries of cells offer certain predictability of the electrical behavior of the design due to the previous characterization of the cells. Besides, different versions of each cell are required in such a way that delay and power consumption characteristics are taken into account, increasing the number of cells in a library. The automatic full custom layout generation is an alternative each time more important to cell based generation approaches. This strategy implements transistors and connections according patterns defined by algorithms. So, it is possible to implement any logic function avoiding the limitations of the library of cells. Tools of analysis and estimate must offer the predictability in automatic full custom layouts. These tools must be able to work with layout estimates and to generate information related to delay, power consumption and area occupation. This work includes the research of new methods of physical synthesis and the implementation of an automatic layout generation in which the cells are generated at the moment of the layout synthesis. The research investigates different strategies of elements disposition (transistors, contacts and connections) in a layout and their effects in the area occupation and circuit delay. The presented layout strategy applies delay optimization by the integration with a gate sizing technique. This is performed in such a way the folding method allows individual discrete sizing to transistors. The main characteristics of the proposed strategy are: power supply lines between rows, over the layout routing (channel routing is not used), circuit routing performed before layout generation and layout generation targeting delay reduction by the application of the sizing technique. The possibility to implement any logic function, without restrictions imposed by a library of cells, allows the circuit synthesis with optimization in the number of the transistors. This reduction in the number of transistors decreases the delay and power consumption, mainly the static power consumption in submicrometer circuits. Comparisons between the proposed strategy and other well-known methods are presented in such a way the proposed method is validated.

Design of a LNA and a Gilbert Cell Mixer MMICs with a GaAs PHEMT technology

The design of a Gilbert Cell Mixer and a low noise amplifier (LNA), using GaAs PHEMT technology is presented. The compatibility is shown for co-integration of both block on the same chip, to form a high performance 1.9 GHz receiver front-end. The designed LNA shows 9.23 dB gain and 2.01 dB noise figure (NF). The mixer is designed to operate at RF=1.9 GHz, LO=2.0 GHz and IF=100 MHz with a gain of 14.3 dB and single sideband noise figure (SSB NF) of 9.6 dB. The mixer presents a bandwith of 8 GHz.

RBF circuits based on folded cascode differential pairs

We propose new circuits for the implementation of Radial Basis Functions such as Gaussian and Gaussian-like functions. These RBFs are obtained by the subtraction of two differential pair output currents in a folded cascode configuration. We also propose a multidimensional version based on the unidimensional circuits. SPICE simulation results indicate good functionality. These circuits are intended to be applied in the implementation of radial basis function networks. One possible application of these networks is transducer signal conditioning in aircraft and spacecraft vehicles onboard telemetry systems. Copyright 2008 ACM.

Spectrum shaping and its application: spread-spectrum clock generator and circuits for ultra wide band

Electromagnetic spectrum can be identified as a resource for the designer, as well as for the manufacturer, from two complementary points of view: first, because it is a good in great demand by many different kind of applications; second, because despite its scarce availability, it may be advantageous to use more spectrum than necessary. This is the case of Spread-Spectrum Systems, those systems in which the transmitted signal is spread over a wide frequency band, much wider, in fact, than the minimum bandwidth required to transmit the information being sent. Part I of this dissertation deals with Spread-Spectrum Clock Generators (SSCG) aiming at reducing Electro Magnetic Interference (EMI) of clock signals in integrated circuits (IC) design. In particular, the modulation of the clock and the consequent spreading of its spectrum are obtained through a random modulating signal outputted by a chaotic map, i.e. a discrete-time dynamical system showing chaotic behavior. The advantages offered by this kind of modulation are highlighted. Three different prototypes of chaos-based SSCG are presented in all their aspects: design, simulation, and post-fabrication measurements. The third one, operating at a frequency equal to 3GHz, aims at being applied to Serial ATA, standard de facto for fast data transmission to and from Hard Disk Drives. The most extreme example of spread-spectrum signalling is the emerging ultra-wideband (UWB) technology, which proposes the use of large sections of the radio spectrum at low amplitudes to transmit high-bandwidth digital data. In part II of the dissertation, two UWB applications are presented, both dealing with the advantages as well as with the challenges of a wide-band system, namely: a chaos-based sequence generation method for reducing Multiple Access Interference (MAI) in Direct Sequence UWB Wireless-Sensor-Networks (WSNs), and design and simulations of a Low-Noise Amplifier (LNA) for impulse radio UWB. This latter topic was studied during a study-abroad period in collaboration with Delft University of Technology, Delft, Netherlands.

Modelling and Design of Advanced Reliable Circuits and Devices for Energy Efficiency

Reliable electronic systems, namely a set of reliable electronic devices connected to each other and working correctly together for the same functionality, represent an essential ingredient for the large-scale commercial implementation of any technological advancement. Microelectronics technologies and new powerful integrated circuits provide noticeable improvements in performance and cost-effectiveness, and allow introducing electronic systems in increasingly diversified contexts. On the other hand, opening of new fields of application leads to new, unexplored reliability issues. The development of semiconductor device and electrical models (such as the well known SPICE models) able to describe the electrical behavior of devices and circuits, is a useful means to simulate and analyze the functionality of new electronic architectures and new technologies. Moreover, it represents an effective way to point out the reliability issues due to the employment of advanced electronic systems in new application contexts. In this thesis modeling and design of both advanced reliable circuits for general-purpose applications and devices for energy efficiency are considered. More in details, the following activities have been carried out: first, reliability issues in terms of security of standard communication protocols in wireless sensor networks are discussed. A new communication protocol is introduced, allows increasing the network security. Second, a novel scheme for the on-die measurement of either clock jitter or process parameter variations is proposed. The developed scheme can be used for an evaluation of both jitter and process parameter variations at low costs. Then, reliability issues in the field of “energy scavenging systems” have been analyzed. An accurate analysis and modeling of the effects of faults affecting circuit for energy harvesting from mechanical vibrations is performed. Finally, the problem of modeling the electrical and thermal behavior of photovoltaic (PV) cells under hot-spot condition is addressed with the development of an electrical and thermal model.

Metrology for submicrometer devices and circuits /

"Issued June 1980."

Accurate linewidth measurements on integrated-circuit photomasks /

"Supported by the Defense Advanced Research Projects Agency ... and the National Bureau of Standards."

Broadband RF current detector

The problems to be solved in this thesis were 1) development of a broadband RF preamplifier to be used with non-ferrous current probes so that the amplified signal exceeds the errors due to cable pickup, no detection is needed in this application, and 2) development of a self-contained device that amplifies and detects the output from a nonferrous current probe, providing a digital readout of the current. These instruments have been completed and are being tested for use by the National Institutes of Occupational Safety and Health (NIOSH). The self-contained current meter operates at frequencies up to 600 MHz, and detects currents as low as 8 mA . At these current magnitudes, the probe (pick-up coil) will output a voltage of 500μV (-53 dBm on 50Ω) which will have to be raised above 0 dBm. The final circuit uses a RF mixer as a variable attenuator in order to increase the dynamic range, two Monolithic Microwave Integrated Circuits (MMIC) for preamplification, a final broadband amplifier to raise the output compression point, a Schottky diode detector, a sample and hold circuit, and a liquid crystal digital panel meter.

Quasi delay insensitive asynchronous circuits for low EMI

International audience

Cascading appearance-based features for visual speaker verification

The cascading appearance-based (CAB) feature extraction technique has established itself as the state of the art in extracting dynamic visual speech features for speech recognition. In this paper, we will focus on investigating the effectiveness of this technique for the related speaker verification application. By investigating the speaker verification ability of each stage of the cascade we will demonstrate that the same steps taken to reduce static speaker and environmental information for the speech recognition application also provide similar improvements for speaker recognition. These results suggest that visual speaker recognition can improve considerable when conducted solely through a consideration of the dynamic speech information rather than the static appearance of the speaker's mouth region.