Latency, Power and Performance Trade-offs in Network-on-Chips by Link Microarchitecture Exploration

This paper presents a power, latency and throughput trade-off study on NoCs by varying microarchitectural (e.g. pipelining) and circuit level (e.g. frequency and voltage) parameters. We change pipelining depth, operating frequency and supply voltage for 3 example NoCs - 16 node 2D Torus, Tree network and Reduced 2D Torus. We use an in-house NoC exploration framework capable of topology generation and comparison using parameterized models of Routers and links developed in SystemC. The framework utilizes interconnect power and delay models from a low-level modelling tool called Intacte[1]1. We find that increased pipelining can actually reduce latency. We also find that there exists an optimal degree of pipelining which is the most energy efficient in terms of minimizing energy-delay product.

Geochemistry of meta-anorthosites from Holénarasipur, Karnataka, South India

Geochemical and Rb---Sr isotope studies indicate that the meta-anorthosites of Holénarasipur, occurring as minor differentiates in ultramafic-mafic complex are igneous intrusives with cumulus character, emplaced around 3095 m.y. ago. The fine-grained nature is secondary; relict cumulus features are preserved in less deformed bodies. In major element chemistry, they compare well with other Archean anorthosites. Abundance levels of Ti, Zr, Y and P indicate the evolution through crystal fractionation of a parental magma; cumulus olivine and pyroxenes dominated chemistry for ultramafites, cumulus plagioclase and possibly clinopyroxene controlled chemistry for anorthosite-gabbros and cumulus magnetite in magnetite-gabbros. Magnetite is not an early cumulate. REE geochemistry is dominated by plagioclase with low abundance levels, slightly LREE enriched and variable positive Eu anomaly. Sr and Image values vary with An content in plagioclase. Isotopic studies show low initial Image (=0.7016) indicating that Rb---Sr isochron age represents the time of intrusion rather than the time of metamorphism.

Synthesis and exploration of novel curcumin analogues as anti-malarial agents

Curcumin, a major yellow pigment and active component of turmeric, has been shown to possess anti-inflammatory and anti-cancer activities. Recent studies have indicated that curcumin inhibits chloroquine-sensitive (CQ-S) and chloroquine-resistant (CQ-R) Plasmodium falciparum growth in culture with an IC50 of not, vert, similar3.25 μM (MIC = 13.2 μM) and IC50 4.21 μM (MIC = 14.4 μM), respectively. In order to expand their potential as anti-malarials a series of novel curcumin derivatives were synthesized and evaluated for their ability to inhibit P. falciparum growth in culture. Several curcumin analogues examined show more effective inhibition of P. falciparumgrowth than curcumin. The most potent curcumin compounds 3, 6, and 11 were inhibitory for CQ-S P. falciparum at IC50 of 0.48, 0.87, 0.92 μM and CQ-R P. falciparum at IC50 of 0.45 μM, 0.89, 0.75 μM, respectively. Pyrazole analogue of curcumin (3) exhibited sevenfold higher anti-malarial potency against CQ-S and ninefold higher anti-malarial potency against CQ-R. Curcumin analogues described here represent a novel class of highly selective P. falciparum inhibitors and promising candidates for the design of novel anti-malarial agents.

Synthesis and exploration of novel curcumin analogues as anti-malarial agents

Curcumin, a major yellow pigment and active component of turmeric, has been shown to possess anti-inflammatory and anti-cancer activities. Recent studies have indicated that curcumin inhibits chloroquine-sensitive (CQ-S) and chloroquine-resistant (CQ-R) Plasmodium falciparum growth in culture with an IC50 of similar to 3.25 mu M (MIC = 13.2 mu M) and IC50 4.21 mu M (MIC = 14.4 mu M), respectively. In order to expand their potential as anti-malarials a series of novel curcumin derivatives were synthesized and evaluated for their ability to inhibit P. falciparum growth in culture. Several curcumin analogues examined show more effective inhibition of P. falciparum growth than curcumin. The most potent curcumin compounds 3, 6, and 11 were inhibitory for CQ-S P. falciparum at IC50 of 0.48, 0.87, 0.92 mu M and CQ-R P. falcipartan at IC50 of 0.45 mu M, 0.89, 0.75 mu M, respectively. Pyrazole analogue of curcumin (3) exhibited sevenfold higher anti-malarial potency against CQ-S and ninefold higher anti-malarial potency against CQ-R. Curcumin analogues described here represent a novel class of highly selective P. falcipartan inhibitors and promising candidates for the design of novel anti-malarial agents. (C) 2007 Elsevier Ltd. All rights reserved.

Geochemistry of fluoride rich groundwater in Kolar and Tumkur Districts of Karnataka

Groundwater is a significant water resource in India for domestic, irrigation, and industrial needs. By far the most serious natural groundwater-quality problem in India, in terms of public health, derives from high fluoride, arsenic, and iron concentrations. Hydrogeochemical investigation of fluoride contaminated groundwater samples from Kolar and Tumkur Districts in Karnataka are undertaken to understand the quality and potability of groundwater from the study area, the level of fluoride contamination, the origin and geochemical mechanisms driving the fluoride enrichment. Majority of the groundwater samples did not meet the potable water criteria as they contained excess (>1.5 mg/L) fluoride, dissolved salts (>500 mg/L) and total hardness (75-924 mg/L). Hydrogeochemical facies of the groundwater samples suggest that rock weathering and evaporation-crystallization control the groundwater composition in the study area with 50-67% of samples belonging to the Ca-HCO3 type and the remaining falling into the mixed Ca-Na-HCO3 or Ca-Mg-Cl type. The saturation index values indicated that the groundwater in the study area is oversaturated with respect to calcite and under-saturated with respect to fluorite. The deficiency of calcium ion concentration in the groundwater from calcite precipitation favors fluorite dissolution leading to excess fluoride concentration.

Methyl ethyl ketone plus water plus secondary butyl alcohol: A potential system for the exploration of a quadruple critical point

We report preliminary experiments on the ternary-liquid mixture, methyl ethyl ketone (MEK)+water (W)+secondary butyl alcohol (sBA)-a promising system for the realization of the quadruple critical point (QCP). The unusual tunnel-shaped phase diagram shown by this system is characterized and visualized by us in the form of a prismatic phase diagram. Light-scattering experiments reveal that (MEK+W+sBA) shows near three-dimensional-Ising type of critical behavior near the lower critical solution temperatures, with the susceptibility exponent (gamma) in the range of 1.217 <=gamma <= 1.246. The correlation length amplitudes (xi(o)) and the critical exponent (nu) of the correlation length (xi) are in the ranges of 3.536 <=xi(o)<= 4.611 A and 0.619 <=nu <= 0.633, respectively. An analysis in terms of the effective susceptibility exponent (gamma(eff)) shows that the critical behavior is of the Ising type for MEK concentrations in the ranges of 0.1000 <= X <= 0.1250 and X >= 0.3000. But, for the intermediate range of 0.1750 <= X < 0.3000, the system shows a tendency towards mean-field type of critical behavior. The advantages of the system (MEK+W+sBA) over the system (3-methylpyridine+water+heavy water+potassium Iodide) for the realization of a QCP are outlined.

Geochemistry of water and ground water in the Nhecolandia, Pantanal of Mato Grosso, Brazil: Variability and associated processes

A distinctive feature of the Nhecolandia, a sub-region of the Pantanal wetland in Brazil, is the presence of both saline and freshwater lakes. Saline lakes used to be attributed to a past and phase during the Pleistocene. However, recent studies have shown that saline and fresh water lakes are linked by a continuous water table, indicating that saline water could come from a contemporary concentration process. This concentration process could also be responsible for the large chemical variability of the waters observed in the area. A regional water sampling has been conducted in surface and sub-surface water and the water table, and the results of the geochemical and statistical analysis are presented. Based on sodium contents, the concentration shows a 1: 4443 ratio. All the samples belong to the same chemical family and evolve in a sodic alkaline manner. Calcite or magnesian calcite precipitates very early in the process of concentration, probably followed by the precipitation of magnesian silicates. The most concentrated solutions remain under-saturated with respect to the sodium carbonate salt, even if this equilibrium is likely reached around the saline lakes. Apparently, significant amounts of sulfate and chloride are lost simultaneously from the solutions, and this cannot be explained solely by evaporative concentration. This could be attributed to the sorption on reduced minerals in a green sub-surface horizon in the "cordilhieira" areas. In the saline lakes, low potassium, phosphate, magnesium, and sulfate are attributed to algal blooms. Under the influence of evaporation, the concentration of solutions and associated chemical precipitations are identified as the main factors responsible for the geochemical variability in this environment (about 92 % of the variance). Therefore, the saline lakes of Nhecolandia have to be managed as landscape units in equilibrium with the present water flows and not inherited from a past and phase. In order to elaborate hydrochemical tracers for a quantitative estimation of water flows, three points have to be investigated more precisely: (1) the quantification of magnesium involved in the Mg-calcite precipitation; (2) the identification of the precise stoichiometry of the Mg-silicate; and (3) the verification of the loss of chloride and sulfate by sorption onto labile iron minerals.

A System-C based Micro architectural Exploration Framework for Latency, Power and Performance Trade-offs of On-Chip Interconnection

We describe a System-C based framework we are developing, to explore the impact of various architectural and microarchitectural level parameters of the on-chip interconnection network elements on its power and performance. The framework enables one to choose from a variety of architectural options like topology, routing policy, etc., as well as allows experimentation with various microarchitectural options for the individual links like length, wire width, pitch, pipelining, supply voltage and frequency. The framework also supports a flexible traffic generation and communication model. We provide preliminary results of using this framework to study the power, latency and throughput of a 4x4 multi-core processing array using mesh, torus and folded torus, for two different communication patterns of dense and sparse linear algebra. The traffic consists of both Request-Response messages (mimicing cache accesses)and One-Way messages. We find that the average latency can be reduced by increasing the pipeline depth, as it enables higher link frequencies. We also find that there exists an optimum degree of pipelining which minimizes energy-delay product.

Memory Architecture Exploration Framework for Cache Based Embedded SoC

Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences critical system design objectives like area, power and performance. Hence the embedded system designer performs a complete memory architecture exploration to custom design a memory architecture for a given set of applications. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of exhaustive-search based memory exploration at the outer level and a two step based integrated data layout for SPRAM-Cache based architectures at the inner level. We present a two step integrated approach for data layout for SPRAM-Cache based hybrid architectures with the first step as data-partitioning that partitions data between SPRAM and Cache, and the second step is the cache conscious data layout. We formulate the cache-conscious data layout as a graph partitioning problem and show that our approach gives up to 34% improvement over an existing approach and also optimizes the off-chip memory address space. We experimented our approach with 3 embedded multimedia applications and our approach explores several hundred memory configurations for each application, yielding several optimal design points in a few hours of computation on a standard desktop.

Streaming FFT on REDEFINE-v2: An Application-Architecture Design Space Exploration

In this paper we explore an implementation of a high-throughput, streaming application on REDEFINE-v2, which is an enhancement of REDEFINE. REDEFINE is a polymorphic ASIC combining the flexibility of a programmable solution with the execution speed of an ASIC. In REDEFINE Compute Elements are arranged in an 8x8 grid connected via a Network on Chip (NoC) called RECONNECT, to realize the various macrofunctional blocks of an equivalent ASIC. For a 1024-FFT we carry out an application-architecture design space exploration by examining the various characterizations of Compute Elements in terms of the size of the instruction store. We further study the impact by using application specific, vectorized FUs. By setting up different partitions of the FFT algorithm for persistent execution on REDEFINE-v2, we derive the benefits of setting up pipelined execution for higher performance. The impact of the REDEFINE-v2 micro-architecture for any arbitrary N-point FFT (N > 4096) FFT is also analyzed. We report the various algorithm-architecture tradeoffs in terms of area and execution speed with that of an ASIC implementation. In addition we compare the performance gain with respect to a GPP.

MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip

The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded DSP is complex and usually custom designed with multiple banks of single-ported or dual ported on-chip scratch pad memory and multiple banks of off-chip memory. Building software for such large complex memories with many of the software components as individually optimized software IPs is a big challenge. In order to obtain good performance and a reduction in memory stalls, the data buffers of the application need to be placed carefully in different types of memory. In this paper we present a unified framework (MODLEX) that combines different data layout optimizations to address the complex DSP memory architectures. Our method models the data layout problem as multi-objective genetic algorithm (GA) with performance and power being the objectives and presents a set of solution points which is attractive from a platform design viewpoint. While most of the work in the literature assumes that performance and power are non-conflicting objectives, our work demonstrates that there is significant trade-off (up to 70%) that is possible between power and performance.

MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip

Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences these parameters. Hence the embedded system designer performs a complete memory architecture exploration. This problem is a multi-objective optimization problem and can be tackled as a two-level optimization problem. The outer level explores various memory architecture while the inner level explores placement of data sections (data layout problem) to minimize memory stalls. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of Multi-objective Genetic Algorithm (Memory Architecture exploration) and an efficient heuristic data placement algorithm. At the outer level the memory architecture exploration is done by picking memory modules directly from a ASIC memory Library. This helps in performing the memory architecture exploration in a integrated framework, where the memory allocation, memory exploration and data layout works in a tightly coupled way to yield optimal design points with respect to area, power and performance. We experimented our approach for 3 embedded applications and our approach explores several thousand memory architecture for each application, yielding a few hundred optimal design points in a few hours of computation time on a standard desktop.