SOS氧化硅栅ISFET特性研究

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

高压SOS/MOS场效应晶体管研制

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

改善SOS单晶膜质量的研究

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

SOS器件及其材料改性的研究

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

SOS/CMOS 模拟电路设计研究及其在DC/DC 转换器中的应用

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

SOS-CMOS DC-DC变换器研究

Submitted by zhangdi (zhangdi@red.semi.ac.cn) on 2009-04-13T11:45:31Z

Characterization of stress induced in SOS and Si/gamma-Al2O3/Si heteroepitaxial thin films by Raman spectroscopy

Raman spectroscopy technique has been performed to investigate the stress induced in as-grown silicon-on-sapphire (SOS), solid-phase-epitaxy (SPE) re-grown SOS, and Si/gamma-Al2O3/Si double-heteroepitaxial thin films. It was demonstrated that the residual stress in SOS film, arising from mismatch and difference of thermal expansion coefficient between silicon and sapphire, was reduced efficiently by SPE process, and that the stress in Si/gamma-Al2O3/Si thin film is much smaller than that of as-grown SOS and SPE upgraded SOS films. The stress decrease for double heteroepitaxial film Si/gamma-Al2O3/Si mainly arises from the smaller lattice mismatching of 2.4% between silicon top layer and the gamma-Al2O3/Si epitaxiial composite substrate, comparing with the large lattice mismatch of 13% for SOS films. It indicated that gamma-Al2O3/Si as a silicon-based epitaxial substrate benefits for reducing the residual stress for further growth of silicon layer, compared with on bulk sapphire substrate. (c) 2005 Elsevier B.V. All rights reserved.

Improvement of thin silicon on sapphire (SOS) film materials and device performances by solid phase epitaxy

The increased emphasis on sub-micron CMOS/SOS devices has placed a demand for high quality thin silicon on sapphire (SOS) films with thickness of the order 100-200 nm. It is demonstrated that the crystalline quality of as-grown thin SOS films by the CVD method can be greatly improved by solid phase epitaxy (SPE) process: implantation of self-silicon ions and subsequent thermal annealing. Subsequent regrowth of this amorphous layer leads to a greater improvement in silicon layer crystallinity and channel carrier mobility, evidenced, respectively, by double crystal X-ray diffraction and electrical measurements. We concluded that the thin SPE SOS films are suitable for application to high-performance CMOS circuitry. (C) 2000 Elsevier Science S.A. All rights reserved.

抗辐照SOS－CMOS集成电路

于G批量导入至Hzhangdi

长寿命卫星用SOS－CMOS集成电路五种电路研制

于G批量导入至Hzhangdi

抗辐射加固CMOS/SOS集成电路研制

于G批量导入至Hzhangdi

改性的薄SOS膜CMOS器件辐射加固特性

利用注硅固相外延的方法对0.2μm SOS薄硅膜材料进行改性,并制作了单管pMOSFET,nMOSFET及54HC04电路.测量了单管的迁移率,并对样品进行了瞬态辐射实验和总剂量辐射实验,发现用改性后的SOS薄硅膜材料制作的电路,不仅具有同标准0.5μm SOS材料制作的电路相当的动态特性,而且具有很好的抗瞬态辐射能力,并且其抗总剂量辐射能力也达到了很高的水平.

薄层SOS薄膜材料外延生长及其器件应用(英文)

亚微米CMOS/SOS器件发展对高质量的100--200纳米厚度的薄层SOS薄膜提出了更高的要求。实验证实：采用CVD方法生长的原生SOS薄膜的晶体质量可以通过固相外延工艺得到明显改进。该工艺包括：硅离子自注入和热退火。X射线双晶衍射和器件电学测量表明：多晶化的SOS薄膜固相外延生长导致硅外延层晶体质量改进和载流子迁移率提高。固相外延改进的薄层SOS薄膜材料能够应用于先进的CMOS电路。

利用改进的固相外延技术改善CMOS/SOS器件的特性

CMOS/SOS器件同体硅CMOS器件相比，载流子迁移率较低，沟道漏电电流放大，它们主要是由异质外延硅膜缺陷，特别是靠近硅蓝宝石界面的硅膜缺陷造成的。该文描述一种改进的固相外延技术提高外延硅膜质量进而改善CMOS/SOS器件特性的实验结果。