Evidence of quantum lateral confinement in side-gated resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAs/AlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The physical diameters vary from 1 to 20 μm. For a nominally 1 μm diameter diode the peak current is reduced by more than 95% at a side-gate voltage of -2 V at 1.5 K, which we estimate corresponds to an active tunnel region diameter of 75 nm ± 10 nm. At high gate biases additional structure appears in the conductance data. Differential I-V measurements show a linear dependence of the spacing of subsidiary peaks on gate bias indicating lateral quantum confinement. © 1996 American Institute of Physics.

Characteristics of multiwalled carbon nanotube nanobridges fabricated by poly(methylmethacrylate) suspended dispersion

Transport measurements were performed on individual PECVD grown MWCNT nanobridge structures. Temperature dependent conductance measurements show that as the temperature is decreased, the conductance also decreases. The nanotubes were able to carry high current densities with the observed maximum at ∼108 A/cm2. High volatile measurements reveal that the PECVD grown MWCNTs break down in segments of nanotube shells.

Single sensor boost converter-based maximum power point tracking algorithms

Two new maximum power point tracking algorithms are presented: the input voltage sensor, and duty ratio maximum power point tracking algorithm (ViSD algorithm); and the output voltage sensor, and duty ratio maximum power point tracking algorithm (VoSD algorithm). The ViSD and VoSD algorithms have the features, characteristics and advantages of the incremental conductance algorithm (INC); but, unlike the incremental conductance algorithm which requires two sensors (the voltage sensor and current sensor), the two algorithms are more desirable because they require only one sensor: the voltage sensor. Moreover, the VoSD technique is less complex; hence, it requires less computational processing. Both the ViSD and the VoSD techniques operate by maximising power at the converter output, instead of the input. The ViSD algorithm uses a voltage sensor placed at the input of a boost converter, while the VoSD algorithm uses a voltage sensor placed at the output of a boost converter. © 2011 IEEE.

Tuning of the electronic characteristics of ZnO nanowire field effect transistors by proton irradiation.

We demonstrated a controllable tuning of the electronic characteristics of ZnO nanowire field effect transistors (FETs) using a high-energy proton beam. After a short proton irradiation time, the threshold voltage shifted to the negative gate bias direction with an increase in the electrical conductance, whereas the threshold voltage shifted to the positive gate bias direction with a decrease in the electrical conductance after a long proton irradiation time. The electrical characteristics of two different types of ZnO nanowires FET device structures in which the ZnO nanowires are placed on the substrate or suspended above the substrate and photoluminescence (PL) studies of the ZnO nanowires provide substantial evidence that the experimental observations result from the irradiation-induced charges in the bulk SiO(2) and at the SiO(2)/ZnO nanowire interface, which can be explained by a surface-band-bending model in terms of gate electric field modulation. Our study on the proton-irradiation-mediated functionalization can be potentially interesting not only for understanding the proton irradiation effects on nanoscale devices, but also for creating the property-tailored nanoscale devices.

Novel nonvolatile memory with multibit storage based on a ZnO nanowire transistor.

We demonstrate a room temperature processed ferroelectric (FE) nonvolatile memory based on a ZnO nanowire (NW) FET where the NW channel is coated with FE nanoparticles. A single device exhibits excellent memory characteristics with the large modulation in channel conductance between ON and OFF states exceeding 10(4), a long retention time of over 4 × 10(4) s, and multibit memory storage ability. Our findings provide a viable way to create new functional high-density nonvolatile memory devices compatible with simple processing techniques at low temperature for flexible devices made on plastic substrates.

Growth of carbon nanotubes on fully processed silicon-on-insulator CMOS substrates.

This paper describes the growth of Carbon Nanotubes (CNTs) both aligned and non-aligned on fully processed CMOS substrates containing high temperature tungsten metallization. While the growth method has been demonstrated in fabricating CNT gas sensitive layers for high temperatures SOI CMOS sensors, it can be employed in a variety of applications which require the use of CNTs or other nanomaterials with CMOS electronics. In our experiments we have grown CNTs both on SOI CMOS substrates and SOI CMOS microhotplates (suspended on membranes formed by post-CMOS deep RIE etching). The fully processed SOI substrates contain CMOS devices and circuits and additionally, some wafers contained high current LDMOSFETs and bipolar structures such as Lateral Insulated Gate Bipolar Transistors. All these devices were used as test structures to investigate the effect of additional post-CMOS processing such as CNT growth, membrane formation, high temperature annealing, etc. Electrical characterisation of the devices with CNTs were performed along with SEM and Raman spectroscopy. The CNTs were grown both at low and high temperatures, the former being compatible with Aluminium metallization while the latter being possible through the use of the high temperature CMOS metallization (Tungsten). In both cases we have found that there is no change in the electrical behaviour of the CMOS devices, circuits or the high current devices. A slight degradation of the thermal performance of the CMOS microhotplates was observed due to the extra heat dissipation path created by the CNT layers, but this is expected as CNTs exhibit a high thermal conductance. In addition we also observed that in the case of high temperature CNT growth a slight degradation in the manufacturing yield was observed. This is especially the case where large area membranes with a diameter in excess of 500 microns are used.

Unified circuit model for the polysilicon TFT

This paper proposes two methods to improve the modelling of thin film transistors (TFTs). The first involves integrating Poissons equation numerically, given a density of trap states and other relevant material parameters including a constant mobility. Theresult is conductance as a numerical function of gate voltage. The second method recognizes that the data for areal conductance found by numerical integration, may easily be found by measurement without making assumptions about the density of trap states.

A unified circuit model for the polysilicon thin film transistor

This paper describes a unified approach to modelling the polysilicon thin film transistor (TFT) for the purposes of circuit design. The approach uses accurate methods of predicting the channel conductance and then fitting the resulting data with a polynomial. Two methods are proposed to find the channel conductance: a device model and measurement. The approach is suitable because the TFT does not have a well defined threshold voltage. The polynomial conductance is then integrated generally to find the drain current and channel charge, necessary for a complete circuit model. © 1991 The Japan Society of Applied Physics.

Measurement of forces during the modification of C60 islands

A UHV atomic force microscope with a conducting tip is used to measure the tip-sample conductance as a function of the applied force on well-ordered, monolayer islands of C60 on Cu(111). By imaging the sample before and after each force-distance experiment, it was possible to investigate the forces required for the removal of individual C60 molecules from the islands. The removal of C60 occurs near defects or edges of the C60 islands and requires an applied force of 5-20 nN, which corresponds to applied pressures of order 1 GPa. In addition, it was possible to investigate the strength of the C60 film on the molecular scale. It was found that the mechanical stiffness of a C60 molecule is of order 6 N/m and the islands appear to undergo a reversible yield process at an applied pressure of around 1.2 GPa.

Novel dual transient temperature modulation technique for multi-vapour detection

Here we present a novel signal processing technique for a square wave thermally-modulated carbon black/polymer composite chemoresistor. The technique consists of only two mathematical operations: summing the off-transient and on-transient conductance signals; and subtracting the steady-state conductance signal. A single carbon black/polyvinylpyrrolidone composite chemo -resistor was fabricated and used to demonstrate the validity of the technique. Classification of water, methanol and ethanol vapours was successfully performed using only the peak time of the resultant curves. Quantification of the different vapours was also possible using the height of the peaks, because it was linearly proportional to concentration. This technique does not require zero-gas calibration and thus is superior to previously reported methods. ©2009 IEEE.

Electric conduction improvement of well-structured multi-walled carbon nanotubes

We characterized the electrical conductance of well-structured multi-walled carbon nanotubes (MWCNTs) which had post-treated by a rapid vacuum arc thermal annealing process and structure defects in these nanotubes are removed. We found that the after rapid vacuum arc annealing, the conductivity of well-structured MWCNTs can be improved by an order of magnitude. We also investigated the conductivity of MWCNTs bundle by the variation of temperatures. These results show that the conductance of annealed defect-free MWCNTs is sensitive to temperature imply the phonon scatting dominated the electron conductions. Compare to the well-structured MWCNTs, the defect scattering dominated the electron conduction in the as-grown control sample which has large amount of structure defects. A detail measurement of electron conduction from an individual well-structured MWCNT shows that the conductivity increases with temperatures which imply such MWCNTs exhibited semiconductor properties. We also produced back-gated field-effect transistors using these MWCNTs. It shows that the well-structured MWCNT can act as p-type semiconductor. © 2010 IEEE.