Hardware reduction in digital delta-sigma modulators via error masking - part I: MASH DDSM
| Contribuinte(s) |
Science Foundation Ireland |
|---|---|
| Data(s) |
29/03/2010
29/03/2010
01/04/2009
26/03/2010
|
| Resumo |
Two classes of techniques have been developed to whiten the quantization noise in digital delta-sigma modulators (DDSMs): deterministic and stochastic. In this two-part paper, a design methodology for reduced-complexity DDSMs is presented. The design methodology is based on error masking. Rules for selecting the word lengths of the stages in multistage architectures are presented. We show that the hardware requirement can be reduced by up to 20% compared with a conventional design, without sacrificing performance. Simulation and experimental results confirm theoretical predictions. Part I addresses MultistAge noise SHaping (MASH) DDSMs; Part II focuses on single-quantizer DDSMs.. Science Foundation Ireland (Grant 02/IN1/I045 and 08/IN1/I1854) Published version Peer reviewed |
| Formato |
application/pdf |
| Identificador |
Ye, ZP, Kennedy, MP (2009) 'Hardware Reduction In Digital Delta-Sigma Modulators Via Error Masking-Part I: Mash Ddsm'. Ieee Transactions On Circuits and Systems I-Regular Papers, 56 (4):714-726. 56 4 714 726 1549-8328 http://hdl.handle.net/10468/132 10.1109/TCSI.2008.2003383 IEEE Transactions On Circuits and Systems I - Regular Papers |
| Idioma(s) |
en |
| Publicador |
IEEE |
| Direitos |
©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. |
| Palavras-Chave | #Digital delta-sigma modulators #Multistage noise shaping #Error masking #Quantization noise #Digital modulation |
| Tipo |
Article (peer-reviewed) |
