A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC


Autoria(s): Dai, FF; Ni, WN; Yin, S; Jaeger, RC
Data(s)

2006

Resumo

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

zhangdi于2010-03-29批量导入

zhangdi于2010-03-29批量导入

Japan Soc Appl Phys.; IEEE Solid-State Circuits Soc.; Inst Elect Informat & Commun Engeers Japan.; IEEE Elect Dev Soc.

Auburn Univ, Dept Elect & Comp Engn, Auburn, AL 36849 USA; Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China

Japan Soc Appl Phys.; IEEE Solid-State Circuits Soc.; Inst Elect Informat & Commun Engeers Japan.; IEEE Elect Dev Soc.

Identificador

http://ir.semi.ac.cn/handle/172111/10036

http://www.irgrid.ac.cn/handle/1471x/66019

Idioma(s)

英语

Publicador

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

445 HOES LANE, PISCATAWAY, NJ 08855 USA

Fonte

Dai, FF; Ni, WN; Yin, S; Jaeger, RC .A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC .见:IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC .IEEE JOURNAL OF SOLID-STATE CIRCUITS,445 HOES LANE, PISCATAWAY, NJ 08855 USA ,APR 2006,41 (4): 839-850

Palavras-Chave #人工智能 #CMOS integrated circuits
Tipo

会议论文